From: Ulrich Weigand Date: Sat, 28 Jun 2008 10:47:36 +0000 (+0000) Subject: re PR target/34856 (ICE with some constant vectors) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d74032d9e1ef0a43d3259fcdc8a8ec2b30edacca;p=gcc.git re PR target/34856 (ICE with some constant vectors) PR target/34856 * config/spu/spu.c (spu_builtin_splats): Do not generate invalid CONST_VECTOR expressions. (spu_expand_vector_init): Likewise. From-SVN: r137218 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 87b85c00552..3fccc8f3c21 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2008-06-28 Ulrich Weigand + + PR target/34856 + * config/spu/spu.c (spu_builtin_splats): Do not generate + invalid CONST_VECTOR expressions. + (spu_expand_vector_init): Likewise. + 2008-06-28 Richard Sandiford * optabs.c (libfunc_decls): New variable. diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c index 4dd3d7cc0fe..e645adb2281 100644 --- a/gcc/config/spu/spu.c +++ b/gcc/config/spu/spu.c @@ -4576,15 +4576,6 @@ spu_builtin_splats (rtx ops[]) constant_to_array (GET_MODE_INNER (mode), ops[1], arr); emit_move_insn (ops[0], array_to_constant (mode, arr)); } - else if (!flag_pic && GET_MODE (ops[0]) == V4SImode && CONSTANT_P (ops[1])) - { - rtvec v = rtvec_alloc (4); - RTVEC_ELT (v, 0) = ops[1]; - RTVEC_ELT (v, 1) = ops[1]; - RTVEC_ELT (v, 2) = ops[1]; - RTVEC_ELT (v, 3) = ops[1]; - emit_move_insn (ops[0], gen_rtx_CONST_VECTOR (mode, v)); - } else { rtx reg = gen_reg_rtx (TImode); @@ -4903,7 +4894,9 @@ spu_expand_vector_init (rtx target, rtx vals) for (i = 0; i < n_elts; ++i) { x = XVECEXP (vals, 0, i); - if (!CONSTANT_P (x)) + if (!(CONST_INT_P (x) + || GET_CODE (x) == CONST_DOUBLE + || GET_CODE (x) == CONST_FIXED)) ++n_var; else { @@ -4940,8 +4933,13 @@ spu_expand_vector_init (rtx target, rtx vals) /* fill empty slots with the first constant, this increases our chance of using splats in the recursive call below. */ for (i = 0; i < n_elts; ++i) - if (!CONSTANT_P (XVECEXP (constant_parts_rtx, 0, i))) - XVECEXP (constant_parts_rtx, 0, i) = first_constant; + { + x = XVECEXP (constant_parts_rtx, 0, i); + if (!(CONST_INT_P (x) + || GET_CODE (x) == CONST_DOUBLE + || GET_CODE (x) == CONST_FIXED)) + XVECEXP (constant_parts_rtx, 0, i) = first_constant; + } spu_expand_vector_init (target, constant_parts_rtx); } @@ -4957,7 +4955,9 @@ spu_expand_vector_init (rtx target, rtx vals) for (i = 0; i < n_elts; ++i) { x = XVECEXP (vals, 0, i); - if (!CONSTANT_P (x)) + if (!(CONST_INT_P (x) + || GET_CODE (x) == CONST_DOUBLE + || GET_CODE (x) == CONST_FIXED)) { if (!register_operand (x, GET_MODE (x))) x = force_reg (GET_MODE (x), x);