From: Luke Kenneth Casson Leighton Date: Mon, 27 Mar 2023 10:57:32 +0000 (+0100) Subject: whitespace (indentation) X-Git-Tag: opf_rfc_ls001_v3~32 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d789a0d649e01c429c5c93ae486ba8a79117a3de;p=libreriscv.git whitespace (indentation) --- diff --git a/openpower/sv/rfc/ls009.mdwn b/openpower/sv/rfc/ls009.mdwn index 44af23b15..45c176e57 100644 --- a/openpower/sv/rfc/ls009.mdwn +++ b/openpower/sv/rfc/ls009.mdwn @@ -522,6 +522,10 @@ SVSHAPE is actively applied or not. The "persistence" bit if set will result in all Active REMAPs being applied indefinitely. +---------------- + +\newpage{} + # svremap instruction SVRM-Form: @@ -538,6 +542,7 @@ SVRM-Form Pseudo-code: +``` # registers RA RB RC RT EA/FRS SVSHAPE0-3 indices SVSTATE[32:33] <- mi0 SVSTATE[34:35] <- mi1 @@ -548,6 +553,7 @@ Pseudo-code: SVSTATE[42:46] <- SVme # persistence bit (applies to more than one instruction) SVSTATE[62] <- pst +``` Special Registers Altered: @@ -680,8 +686,10 @@ it begins from xdimsz-1 and iterates down to zero. Likewise for y and z. offset will have the effect of offsetting the result by ```offset``` elements: +``` for i in 0..VL-1: GPR(RT + remap(i) + SVSHAPE.offset) = .... +``` this appears redundant because the register RT could simply be changed by a compiler, until element width overrides are introduced. also bear in mind that unlike a static compiler SVSHAPE.offset may @@ -696,7 +704,9 @@ X,Y of dimensionality X=3 and Y=2, set xdimsz=2, ydimsz=1 and zdimsz=0 The format of the array is therefore as follows: +``` array[xdimsz+1][ydimsz+1][zdimsz+1] +``` However whilst illustrative of the dimensionality, that does not take the "permute" setting into account. "permute" may be any one of six values @@ -732,12 +742,12 @@ and includes optional limited 2D reordering. In its simplest form (without elwidth overrides or other modes): ``` -def index_remap(i): - return GPR((SVSHAPE.SVGPR<<1)+i) + SVSHAPE.offset + def index_remap(i): + return GPR((SVSHAPE.SVGPR<<1)+i) + SVSHAPE.offset -for i in 0..VL-1: - element_result = .... - GPR(RT + indexed_remap(i)) = element_result + for i in 0..VL-1: + element_result = .... + GPR(RT + indexed_remap(i)) = element_result ``` With element-width overrides included, and using the pseudocode @@ -745,16 +755,16 @@ from the SVP64 [[sv/svp64/appendix#elwidth]] elwidth section this becomes: ``` -def index_remap(i): - svreg = SVSHAPE.SVGPR << 1 - srcwid = elwid_to_bitwidth(SVSHAPE.elwid) - offs = SVSHAPE.offset - return get_polymorphed_reg(svreg, srcwid, i) + offs - -for i in 0..VL-1: - element_result = .... - rt_idx = indexed_remap(i) - set_polymorphed_reg(RT, destwid, rt_idx, element_result) + def index_remap(i): + svreg = SVSHAPE.SVGPR << 1 + srcwid = elwid_to_bitwidth(SVSHAPE.elwid) + offs = SVSHAPE.offset + return get_polymorphed_reg(svreg, srcwid, i) + offs + + for i in 0..VL-1: + element_result = .... + rt_idx = indexed_remap(i) + set_polymorphed_reg(RT, destwid, rt_idx, element_result) ``` Matrix-style reordering still applies to the indices, except limited @@ -766,21 +776,21 @@ overrides) may be written in terms of Matrix Mode, specifically purposed to ensure that the 3rd dimension (Z) has no effect: ``` -def index_remap(ISHAPE, i): - MSHAPE.skip = 0b0 || ISHAPE.sk1 - MSHAPE.invxyz = 0b0 || ISHAPE.invxy - MSHAPE.xdimsz = ISHAPE.xdimsz - MSHAPE.ydimsz = ISHAPE.ydimsz - MSHAPE.zdimsz = 0 # disabled - if ISHAPE.permute = 0b110 # 0,1 - MSHAPE.permute = 0b000 # 0,1,2 - if ISHAPE.permute = 0b111 # 1,0 - MSHAPE.permute = 0b010 # 1,0,2 - el_idx = remap_matrix(MSHAPE, i) - svreg = ISHAPE.SVGPR << 1 - srcwid = elwid_to_bitwidth(ISHAPE.elwid) - offs = ISHAPE.offset - return get_polymorphed_reg(svreg, srcwid, el_idx) + offs + def index_remap(ISHAPE, i): + MSHAPE.skip = 0b0 || ISHAPE.sk1 + MSHAPE.invxyz = 0b0 || ISHAPE.invxy + MSHAPE.xdimsz = ISHAPE.xdimsz + MSHAPE.ydimsz = ISHAPE.ydimsz + MSHAPE.zdimsz = 0 # disabled + if ISHAPE.permute = 0b110 # 0,1 + MSHAPE.permute = 0b000 # 0,1,2 + if ISHAPE.permute = 0b111 # 1,0 + MSHAPE.permute = 0b010 # 1,0,2 + el_idx = remap_matrix(MSHAPE, i) + svreg = ISHAPE.SVGPR << 1 + srcwid = elwid_to_bitwidth(ISHAPE.elwid) + offs = ISHAPE.offset + return get_polymorphed_reg(svreg, srcwid, el_idx) + offs ``` The most important observation above is that the Matrix-style