From: Jacob Lifshay <programmerjake@gmail.com>
Date: Fri, 8 Jul 2022 06:15:19 +0000 (-0700)
Subject: add input/output register comments
X-Git-Tag: opf_rfc_ls005_v1~1273
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d809884f14570bc7f2e9a4a7b43c2ea15eb15aba;p=libreriscv.git

add input/output register comments
---

diff --git a/openpower/atomics.mdwn b/openpower/atomics.mdwn
index 79ee04f26..0ac92a556 100644
--- a/openpower/atomics.mdwn
+++ b/openpower/atomics.mdwn
@@ -57,11 +57,13 @@ not_eq:
 `atomic_load_acquire` is 4 instructions, including a branch and an unnecessarily-strong memory fence:
 
 ```
+# address in r3
     ld 3, 0(3)
     cmpw 0, 3, 3
     bne- skip
     isync
 skip:
+# output in r3
 ```
 
 Having single atomic operations is useful for implementations that want to send atomic operations to a shared cache since they can be more efficient to execute there, rather than having to move a whole cache block. Relying exclusively on