From: lkcl <lkcl@web>
Date: Mon, 17 Apr 2023 13:45:51 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d848a7271ab7984a3a7ea8b7c1ffc918b64a507c;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls005.mdwn b/openpower/sv/rfc/ls005.mdwn
index 1f064d2e9..1ef796de7 100644
--- a/openpower/sv/rfc/ls005.mdwn
+++ b/openpower/sv/rfc/ls005.mdwn
@@ -140,7 +140,7 @@ the full width".
 
 # Examples
 
-add pseudocode examples demonstrating modification.
+## pseudocode examples demonstrating modification.
 
 before for popcntb:
 
@@ -164,6 +164,19 @@ do i = 0 to ((XLEN/8)-1)
    RA[(i*8):(i*8)+7] <-  n
 ```
 
+## no modification needed, but function changes
+
+For the `addi` instruction there is no apparent change:
+
+```
+RT <- (RA|0) + EXTS(SI)
+```
+
+However behind the scenes, RA is XLEN bits wide, therefore EXTS performs an
+increase in bitlength not to exactly 64 but to XLEN.  Obviousy for XLEN=16
+there is no sign-extension, and for XLEN=8 truncation of `SI` will occur.
+
+
 
 \newpage{}