From: Uros Bizjak Date: Mon, 11 Apr 2011 21:39:40 +0000 (+0200) Subject: sse.md (VI): New mode iterator. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d8700b1cdb121c1a15229fc5ff854959820c1707;p=gcc.git sse.md (VI): New mode iterator. * config/i386/sse.md (VI): New mode iterator. (SSEMODEI): Remove. (AVX256MODEI): Ditto. (AVXMODEF4P): Ditto. (avxvecpsmode): Ditto. (one_cmpl2): Enable for TARGET_SSE. Use VI mode iterator. (sse2_andnot3): New expander. (*andnot3): Merge with *sse2_andnot3 and *avx_andnot3. Enable for TARGET_SSE. Use VI mode iterator. (3): Use VI mode iterator. (*3): Merge with *sse2_3 and *avx_3. Use VI mode iterator. (*andnottf3): Handle AVX three-operand constraints. (*tf3): Handle AVX three-operand constraints. From-SVN: r172280 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f8634740bf3..89dc4087041 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,22 @@ +2011-04-12 Uros Bizjak + + * config/i386/sse.md (VI): New mode iterator. + (SSEMODEI): Remove. + (AVX256MODEI): Ditto. + (AVXMODEF4P): Ditto. + (avxvecpsmode): Ditto. + (one_cmpl2): Enable for TARGET_SSE. Use VI mode iterator. + (sse2_andnot3): New expander. + (*andnot3): Merge with *sse2_andnot3 and + *avx_andnot3. Enable for TARGET_SSE. Use VI mode iterator. + (3): Use VI mode iterator. + (*3): Merge with *sse2_3 + and *avx_3. Use VI mode iterator. + (*andnottf3): Handle AVX three-operand constraints. + (*tf3): Handle AVX three-operand constraints. + 2011-04-11 Joseph Myers - Robert Millan + Robert Millan * config.gcc (x86_64-*-kfreebsd*-gnu): Use i386/kfreebsd-gnu.h. * config/i386/kfreebsd-gnu.h (GNU_USER_DYNAMIC_LINKER32, @@ -9,8 +26,7 @@ * config/i386/knetbsd-gnu.h (GNU_USER_LINK_EMULATION): Define. (REG_NAME): Don't undefine. (MD_UNWIND_SUPPORT): Undefine. - * config/i386/kopensolaris-gnu.h (GNU_USER_LINK_EMULATION): - Define. + * config/i386/kopensolaris-gnu.h (GNU_USER_LINK_EMULATION): Define. 2011-04-11 Joseph Myers @@ -110,8 +126,7 @@ LINUX_TARGET_OS_CPP_BUILTINS to GNU_USER_TARGET_OS_CPP_BUILTINS. * config/pa/pa-linux.h (TARGET_OS_CPP_BUILTINS): Change LINUX_TARGET_OS_CPP_BUILTINS to GNU_USER_TARGET_OS_CPP_BUILTINS. - (LINK_SPEC): Change LINUX_DYNAMIC_LINKER to - GNU_USER_DYNAMIC_LINKER. + (LINK_SPEC): Change LINUX_DYNAMIC_LINKER to GNU_USER_DYNAMIC_LINKER. * config/rs6000/linux64.h (LINUX_DYNAMIC_LINKER32): Rename to GNU_USER_DYNAMIC_LINKER32. (LINUX_DYNAMIC_LINKER64): Rename to GNU_USER_DYNAMIC_LINKER64. @@ -142,8 +157,7 @@ LINUX_TARGET_OS_CPP_BUILTINS to GNU_USER_TARGET_OS_CPP_BUILTINS. * config/xtensa/linux.h (TARGET_OS_CPP_BUILTINS): Change LINUX_TARGET_OS_CPP_BUILTINS to GNU_USER_TARGET_OS_CPP_BUILTINS. - (LINK_SPEC): Change LINUX_DYNAMIC_LINKER to - GNU_USER_DYNAMIC_LINKER. + (LINK_SPEC): Change LINUX_DYNAMIC_LINKER to GNU_USER_DYNAMIC_LINKER. 2011-04-11 Joseph Myers @@ -194,8 +208,7 @@ * config.gcc (i[34567]86-*-linux* | i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i[34567]86-*-gnu* | i[34567]86-*-kopensolaris*-gnu, x86_64-*-linux* | - x86_64-*-kfreebsd*-gnu | x86_64-*-knetbsd*-gnu): Use the new - headers. + x86_64-*-kfreebsd*-gnu | x86_64-*-knetbsd*-gnu): Use the new headers. 2011-04-11 Kai Tietz diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index ad50d5e22e5..14060cf15ec 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -36,6 +36,13 @@ (define_mode_iterator VF_128 [(V4SF "TARGET_SSE") (V2DF "TARGET_SSE2")]) +;; All vector integer modes +(define_mode_iterator VI + [(V32QI "TARGET_AVX") V16QI + (V16HI "TARGET_AVX") V8HI + (V8SI "TARGET_AVX") V4SI + (V4DI "TARGET_AVX") V2DI]) + ;; All 128bit vector integer modes (define_mode_iterator VI_128 [V16QI V8HI V4SI V2DI]) @@ -50,16 +57,10 @@ ;; Instruction suffix for sign and zero extensions. (define_code_attr extsuffix [(sign_extend "sx") (zero_extend "zx")]) -;; 16 byte integral modes handled by SSE -(define_mode_iterator SSEMODEI [V16QI V8HI V4SI V2DI]) - ;; All 16-byte vector modes handled by SSE (define_mode_iterator SSEMODE [V16QI V8HI V4SI V2DI V4SF V2DF]) (define_mode_iterator SSEMODE16 [V16QI V8HI V4SI V2DI V1TI V4SF V2DF]) -;; 32 byte integral vector modes handled by AVX -(define_mode_iterator AVX256MODEI [V32QI V16HI V8SI V4DI]) - ;; All 32-byte vector modes handled by AVX (define_mode_iterator AVX256MODE [V32QI V16HI V8SI V4DI V8SF V4DF]) @@ -86,7 +87,6 @@ (define_mode_iterator AVX256MODE4P [V4DI V4DF]) (define_mode_iterator AVX256MODE8P [V8SI V8SF]) (define_mode_iterator AVXMODEF2P [V4SF V2DF V8SF V4DF]) -(define_mode_iterator AVXMODEF4P [V4SF V4DF]) (define_mode_iterator AVXMODEFDP [V2DF V4DF]) (define_mode_iterator AVXMODEFSP [V4SF V8SF]) @@ -160,9 +160,6 @@ [(V16QI "TI") (V8HI "TI") (V4SI "TI") (V2DI "TI") (V1TI "TI") (V4SF "V4SF") (V8SF "V8SF") (V2DF "V2DF") (V4DF "V4DF") (V32QI "OI") (V16HI "OI") (V8SI "OI") (V4DI "OI")]) -(define_mode_attr avxvecpsmode - [(V16QI "V4SF") (V8HI "V4SF") (V4SI "V4SF") (V2DI "V4SF") - (V32QI "V8SF") (V16HI "V8SF") (V8SI "V8SF") (V4DI "V8SF")]) (define_mode_attr avxhalfvecmode [(V32QI "V16QI") (V16HI "V8HI") (V8SI "V4SI") (V4DI "V2DI") (V8SF "V4SF") (V4DF "V2DF") @@ -5775,10 +5772,10 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; (define_expand "one_cmpl2" - [(set (match_operand:SSEMODEI 0 "register_operand" "") - (xor:SSEMODEI (match_operand:SSEMODEI 1 "nonimmediate_operand" "") - (match_dup 2)))] - "TARGET_SSE2" + [(set (match_operand:VI 0 "register_operand" "") + (xor:VI (match_operand:VI 1 "nonimmediate_operand" "") + (match_dup 2)))] + "TARGET_SSE" { int i, n = GET_MODE_NUNITS (mode); rtvec v = rtvec_alloc (n); @@ -5789,112 +5786,123 @@ operands[2] = force_reg (mode, gen_rtx_CONST_VECTOR (mode, v)); }) -(define_insn "*avx_andnot3" - [(set (match_operand:AVX256MODEI 0 "register_operand" "=x") - (and:AVX256MODEI - (not:AVX256MODEI (match_operand:AVX256MODEI 1 "register_operand" "x")) - (match_operand:AVX256MODEI 2 "nonimmediate_operand" "xm")))] - "TARGET_AVX" - "vandnps\t{%2, %1, %0|%0, %1, %2}" - [(set_attr "type" "sselog") - (set_attr "prefix" "vex") - (set_attr "mode" "")]) - -(define_insn "*sse_andnot3" - [(set (match_operand:SSEMODEI 0 "register_operand" "=x") - (and:SSEMODEI - (not:SSEMODEI (match_operand:SSEMODEI 1 "register_operand" "0")) - (match_operand:SSEMODEI 2 "nonimmediate_operand" "xm")))] - "(TARGET_SSE && !TARGET_SSE2)" - "andnps\t{%2, %0|%0, %2}" - [(set_attr "type" "sselog") - (set_attr "mode" "V4SF")]) +(define_expand "sse2_andnot3" + [(set (match_operand:VI_128 0 "register_operand" "") + (and:VI_128 + (not:VI_128 (match_operand:VI_128 1 "register_operand" "")) + (match_operand:VI_128 2 "nonimmediate_operand" "")))] + "TARGET_SSE2") -(define_insn "*avx_andnot3" - [(set (match_operand:SSEMODEI 0 "register_operand" "=x") - (and:SSEMODEI - (not:SSEMODEI (match_operand:SSEMODEI 1 "register_operand" "x")) - (match_operand:SSEMODEI 2 "nonimmediate_operand" "xm")))] - "TARGET_AVX" - "vpandn\t{%2, %1, %0|%0, %1, %2}" - [(set_attr "type" "sselog") - (set_attr "prefix" "vex") - (set_attr "mode" "TI")]) +(define_insn "*andnot3" + [(set (match_operand:VI 0 "register_operand" "=x,x") + (and:VI + (not:VI (match_operand:VI 1 "register_operand" "0,x")) + (match_operand:VI 2 "nonimmediate_operand" "xm,xm")))] + "TARGET_SSE" +{ + static char buf[32]; + const char *ops; + const char *tmp + = (get_attr_mode (insn) == MODE_TI) ? "pandn" : "andnps"; -(define_insn "sse2_andnot3" - [(set (match_operand:SSEMODEI 0 "register_operand" "=x") - (and:SSEMODEI - (not:SSEMODEI (match_operand:SSEMODEI 1 "register_operand" "0")) - (match_operand:SSEMODEI 2 "nonimmediate_operand" "xm")))] - "TARGET_SSE2" - "pandn\t{%2, %0|%0, %2}" - [(set_attr "type" "sselog") - (set_attr "prefix_data16" "1") - (set_attr "mode" "TI")]) + switch (which_alternative) + { + case 0: + ops = "%s\t{%%2, %%0|%%0, %%2}"; + break; + case 1: + ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; + break; + default: + gcc_unreachable (); + } -(define_insn "*andnottf3" - [(set (match_operand:TF 0 "register_operand" "=x") - (and:TF - (not:TF (match_operand:TF 1 "register_operand" "0")) - (match_operand:TF 2 "nonimmediate_operand" "xm")))] - "TARGET_SSE2" - "pandn\t{%2, %0|%0, %2}" - [(set_attr "type" "sselog") - (set_attr "prefix_data16" "1") - (set_attr "mode" "TI")]) + snprintf (buf, sizeof (buf), ops, tmp); + return buf; +} + [(set_attr "isa" "noavx,avx") + (set_attr "type" "sselog") + (set (attr "prefix_data16") + (if_then_else + (and (eq_attr "alternative" "0") + (eq_attr "mode" "TI")) + (const_string "1") + (const_string "*"))) + (set_attr "prefix" "orig,vex") + (set (attr "mode") + (cond [(ne (symbol_ref "GET_MODE_SIZE (mode) > 128") (const_int 0)) + (const_string "V8SF") + (ne (symbol_ref "TARGET_SSE2") (const_int 0)) + (const_string "TI") + ] + (const_string "V4SF")))]) (define_expand "3" - [(set (match_operand:SSEMODEI 0 "register_operand" "") - (any_logic:SSEMODEI - (match_operand:SSEMODEI 1 "nonimmediate_operand" "") - (match_operand:SSEMODEI 2 "nonimmediate_operand" "")))] + [(set (match_operand:VI 0 "register_operand" "") + (any_logic:VI + (match_operand:VI 1 "nonimmediate_operand" "") + (match_operand:VI 2 "nonimmediate_operand" "")))] "TARGET_SSE" "ix86_fixup_binary_operands_no_copy (, mode, operands);") -(define_insn "*avx_3" - [(set (match_operand:AVX256MODEI 0 "register_operand" "=x") - (any_logic:AVX256MODEI - (match_operand:AVX256MODEI 1 "nonimmediate_operand" "%x") - (match_operand:AVX256MODEI 2 "nonimmediate_operand" "xm")))] - "TARGET_AVX - && ix86_binary_operator_ok (, mode, operands)" - "vps\t{%2, %1, %0|%0, %1, %2}" - [(set_attr "type" "sselog") - (set_attr "prefix" "vex") - (set_attr "mode" "")]) - -(define_insn "*sse_3" - [(set (match_operand:SSEMODEI 0 "register_operand" "=x") - (any_logic:SSEMODEI - (match_operand:SSEMODEI 1 "nonimmediate_operand" "%0") - (match_operand:SSEMODEI 2 "nonimmediate_operand" "xm")))] - "(TARGET_SSE && !TARGET_SSE2) +(define_insn "*3" + [(set (match_operand:VI 0 "register_operand" "=x,x") + (any_logic:VI + (match_operand:VI 1 "nonimmediate_operand" "%0,x") + (match_operand:VI 2 "nonimmediate_operand" "xm,xm")))] + "TARGET_SSE && ix86_binary_operator_ok (, mode, operands)" - "ps\t{%2, %0|%0, %2}" - [(set_attr "type" "sselog") - (set_attr "mode" "V4SF")]) +{ + static char buf[32]; + const char *ops; + const char *tmp + = (get_attr_mode (insn) == MODE_TI) ? "p" : "ps"; -(define_insn "*avx_3" - [(set (match_operand:SSEMODEI 0 "register_operand" "=x") - (any_logic:SSEMODEI - (match_operand:SSEMODEI 1 "nonimmediate_operand" "%x") - (match_operand:SSEMODEI 2 "nonimmediate_operand" "xm")))] - "TARGET_AVX - && ix86_binary_operator_ok (, mode, operands)" - "vp\t{%2, %1, %0|%0, %1, %2}" - [(set_attr "type" "sselog") - (set_attr "prefix" "vex") - (set_attr "mode" "TI")]) + switch (which_alternative) + { + case 0: + ops = "%s\t{%%2, %%0|%%0, %%2}"; + break; + case 1: + ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; + break; + default: + gcc_unreachable (); + } -(define_insn "*sse2_3" - [(set (match_operand:SSEMODEI 0 "register_operand" "=x") - (any_logic:SSEMODEI - (match_operand:SSEMODEI 1 "nonimmediate_operand" "%0") - (match_operand:SSEMODEI 2 "nonimmediate_operand" "xm")))] - "TARGET_SSE2 && ix86_binary_operator_ok (, mode, operands)" - "p\t{%2, %0|%0, %2}" - [(set_attr "type" "sselog") - (set_attr "prefix_data16" "1") + snprintf (buf, sizeof (buf), ops, tmp); + return buf; +} + [(set_attr "isa" "noavx,avx") + (set_attr "type" "sselog") + (set (attr "prefix_data16") + (if_then_else + (and (eq_attr "alternative" "0") + (eq_attr "mode" "TI")) + (const_string "1") + (const_string "*"))) + (set_attr "prefix" "orig,vex") + (set (attr "mode") + (cond [(ne (symbol_ref "GET_MODE_SIZE (mode) > 128") (const_int 0)) + (const_string "V8SF") + (ne (symbol_ref "TARGET_SSE2") (const_int 0)) + (const_string "TI") + ] + (const_string "V4SF")))]) + +(define_insn "*andnottf3" + [(set (match_operand:TF 0 "register_operand" "=x,x") + (and:TF + (not:TF (match_operand:TF 1 "register_operand" "0,x")) + (match_operand:TF 2 "nonimmediate_operand" "xm,xm")))] + "TARGET_SSE2" + "@ + pandn\t{%2, %0|%0, %2} + vpandn\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "isa" "noavx,avx") + (set_attr "type" "sselog") + (set_attr "prefix_data16" "1,*") + (set_attr "prefix" "orig,vex") (set_attr "mode" "TI")]) (define_expand "tf3" @@ -5906,14 +5914,19 @@ "ix86_fixup_binary_operands_no_copy (, TFmode, operands);") (define_insn "*tf3" - [(set (match_operand:TF 0 "register_operand" "=x") + [(set (match_operand:TF 0 "register_operand" "=x,x") (any_logic:TF - (match_operand:TF 1 "nonimmediate_operand" "%0") - (match_operand:TF 2 "nonimmediate_operand" "xm")))] - "TARGET_SSE2 && ix86_binary_operator_ok (, TFmode, operands)" - "p\t{%2, %0|%0, %2}" - [(set_attr "type" "sselog") - (set_attr "prefix_data16" "1") + (match_operand:TF 1 "nonimmediate_operand" "%0,x") + (match_operand:TF 2 "nonimmediate_operand" "xm,xm")))] + "TARGET_SSE2 + && ix86_binary_operator_ok (, TFmode, operands)" + "@ + p\t{%2, %0|%0, %2} + vp\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "isa" "noavx,avx") + (set_attr "type" "sselog") + (set_attr "prefix_data16" "1,*") + (set_attr "prefix" "orig,vex") (set_attr "mode" "TI")]) ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;