From: Clifford Wolf Date: Tue, 19 Mar 2013 12:32:39 +0000 (+0100) Subject: improved $mux optimization in opt_const X-Git-Tag: yosys-0.2.0~711^2~1 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d8a7fa6b6771245b99af41783cbb3b8c0a12946a;p=yosys.git improved $mux optimization in opt_const --- diff --git a/passes/opt/opt_const.cc b/passes/opt/opt_const.cc index 1e9b1331b..aa376ae0e 100644 --- a/passes/opt/opt_const.cc +++ b/passes/opt/opt_const.cc @@ -242,11 +242,15 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module) FOLD_1ARG_CELL(pos) FOLD_1ARG_CELL(neg) + // be very conservative with optimizing $mux cells as we do not want to break mux trees if (cell->type == "$mux") { - RTLIL::SigSpec input = cell->connections["\\S"]; - assign_map.apply(input); + RTLIL::SigSpec input = assign_map(cell->connections["\\S"]); + RTLIL::SigSpec inA = assign_map(cell->connections["\\A"]); + RTLIL::SigSpec inB = assign_map(cell->connections["\\B"]); if (input.is_fully_const()) ACTION_DO("\\Y", input.as_bool() ? cell->connections["\\B"] : cell->connections["\\A"]); + else if (inA == inB) + ACTION_DO("\\Y", cell->connections["\\A"]); } next_cell:;