From: lkcl <lkcl@web>
Date: Thu, 7 Apr 2022 22:15:49 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2856
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d8c7489a90c4b726c51b8df4bab0a914767e3a06;p=libreriscv.git

---

diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index 8139f8814..490e1efdf 100644
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -192,7 +192,8 @@ Brief description of fields:
   If VLI (Vector Length Inclusive) is clear,
   VL is truncated to *exclude* the current element, otherwise it is
   included. SVSTATE.MVL is not altered: only VL.
-* **LRu**: Link Register Update, used in conjunction with LK=1.
+* **LRu**: Link Register Update, used in conjunction with LK=1
+  to make LR update conditional
 * **VSb** In VLSET Mode, after testing,
   if VSb is set, VL is truncated if the test succeeds.  If VSb is clear,
   VL is truncated if a test *fails*. Masked-out (skipped)