From: Nathan Binkert Date: Tue, 13 Feb 2007 08:59:01 +0000 (-0800) Subject: Merge all of the execution trace configuration stuff into X-Git-Tag: m5_2.0_beta3~199 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d8c7ebf904e49d0ebf62099c35af0705de3c3f81;p=gem5.git Merge all of the execution trace configuration stuff into the traceflags infrastructure. InstExec is now just Exec and all of the command line options are now trace options. --HG-- extra : convert_revision : 4adfa9dfbb32622d30ef4e63c06c7d87da793c8f --- diff --git a/src/base/traceflags.py b/src/base/traceflags.py index dd5ade5af..335629467 100644 --- a/src/base/traceflags.py +++ b/src/base/traceflags.py @@ -77,6 +77,20 @@ baseFlags = [ 'EthernetPIO', 'EthernetSM', 'Event', + 'ExecEnable', + 'ExecCPSeq', + 'ExecEffAddr', + 'ExecFetchSeq', + 'ExecIntRegs', + 'ExecIntel', + 'ExecLegion', + 'ExecOpClass', + 'ExecRegDelta', + 'ExecResult', + 'ExecSpeculative', + 'ExecSymbol', + 'ExecThread', + 'ExecTicks', 'FE', 'Fault', 'Fetch', @@ -102,7 +116,6 @@ baseFlags = [ 'ISP', 'IdeCtrl', 'IdeDisk', - 'InstExec', 'Interrupt', 'LLSC', 'LSQ', @@ -173,6 +186,9 @@ compoundFlagMap = { 'EthernetSM', 'EthernetCksum' ], 'EthernetNoData' : [ 'Ethernet', 'EthernetPIO', 'EthernetDesc', 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ], + 'Exec' : [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', + 'ExecThread', 'ExecEffAddr', 'ExecResult', + 'ExecSymbol' ], 'GDBAll' : [ 'GDBMisc', 'GDBAcc', 'GDBRead', 'GDBWrite', 'GDBSend', 'GDBRecv', 'GDBExtra' ], 'IdeAll' : [ 'IdeCtrl', 'IdeDisk' ], diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc index 683cb138e..c4d3ae505 100644 --- a/src/cpu/exetrace.cc +++ b/src/cpu/exetrace.cc @@ -64,6 +64,27 @@ static bool wasMicro = false; namespace Trace { SharedData *shared_data = NULL; + +void +setupSharedData() +{ + int shmfd = shmget('M' << 24 | getuid(), sizeof(SharedData), 0777); + if (shmfd < 0) + fatal("Couldn't get shared memory fd. Is Legion running?"); + + shared_data = (SharedData*)shmat(shmfd, NULL, SHM_RND); + if (shared_data == (SharedData*)-1) + fatal("Couldn't allocate shared memory"); + + if (shared_data->flags != OWN_M5) + fatal("Shared memory has invalid owner"); + + if (shared_data->version != VERSION) + fatal("Shared Data is wrong version! M5: %d Legion: %d", VERSION, + shared_data->version); + + // step legion forward one cycle so we can get register values + shared_data->flags = OWN_LEGION; } //////////////////////////////////////////////////////////////////////// @@ -128,7 +149,7 @@ Trace::InstRecord::dump() ostream &outs = Trace::output(); DPRINTF(Sparc, "Instruction: %#X\n", staticInst->machInst); - if (flags[PRINT_REG_DELTA]) + if (IsOn(ExecRegDelta)) { #if THE_ISA == SPARC_ISA //Don't print what happens for each micro-op, just print out @@ -189,34 +210,25 @@ Trace::InstRecord::dump() } #endif } - else if (flags[INTEL_FORMAT]) { -#if FULL_SYSTEM - bool is_trace_system = (thread->getCpuPtr()->system->name() == trace_system); -#else - bool is_trace_system = true; -#endif - if (is_trace_system) { - ccprintf(outs, "%7d ) ", when); - outs << "0x" << hex << PC << ":\t"; - if (staticInst->isLoad()) { - outs << ""; - } else if (staticInst->isStore()) { - outs << ""; - } - outs << endl; + else if (IsOn(ExecIntel)) { + ccprintf(outs, "%7d ) ", when); + outs << "0x" << hex << PC << ":\t"; + if (staticInst->isLoad()) { + ccprintf(outs, "", addr); + } else if (staticInst->isStore()) { + ccprintf(outs, "", addr); } + outs << endl; } else { - if (flags[PRINT_TICKS]) + if (IsOn(ExecTicks)) ccprintf(outs, "%7d: ", when); outs << thread->getCpuPtr()->name() << " "; - if (flags[TRACE_MISSPEC]) + if (IsOn(ExecSpeculative)) outs << (misspeculating ? "-" : "+") << " "; - if (flags[PRINT_THREAD_NUM]) + if (IsOn(ExecThread)) outs << "T" << thread->getThreadNum() << " : "; @@ -224,7 +236,7 @@ Trace::InstRecord::dump() Addr sym_addr; if (debugSymbolTable && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr) - && flags[PC_SYMBOL]) { + && IsOn(ExecSymbol)) { if (PC != sym_addr) sym_str += csprintf("+%d", PC - sym_addr); outs << "@" << sym_str << " : "; @@ -250,11 +262,11 @@ Trace::InstRecord::dump() outs << " : "; - if (flags[PRINT_OP_CLASS]) { + if (IsOn(ExecOpClass)) { outs << opClassStrings[staticInst->opClass()] << " : "; } - if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) { + if (IsOn(ExecResult) && data_status != DataInvalid) { outs << " D="; #if 0 if (data_status == DataDouble) @@ -266,10 +278,10 @@ Trace::InstRecord::dump() #endif } - if (flags[PRINT_EFF_ADDR] && addr_valid) + if (IsOn(ExecEffAddr) && addr_valid) outs << " A=0x" << hex << addr; - if (flags[PRINT_INT_REGS] && regs_valid) { + if (IsOn(ExecIntRegs) && regs_valid) { for (int i = 0; i < TheISA::NumIntRegs;) for (int j = i + 1; i <= j; i++) ccprintf(outs, "r%02d = %#018x%s", i, @@ -278,10 +290,10 @@ Trace::InstRecord::dump() outs << "\n"; } - if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid) + if (IsOn(ExecFetchSeq) && fetch_seq_valid) outs << " FetchSeq=" << dec << fetch_seq; - if (flags[PRINT_CP_SEQ] && cp_seq_valid) + if (IsOn(ExecCPSeq) && cp_seq_valid) outs << " CPSeq=" << dec << cp_seq; // @@ -291,7 +303,7 @@ Trace::InstRecord::dump() } #if THE_ISA == SPARC_ISA && FULL_SYSTEM // Compare - if (flags[LEGION_LOCKSTEP]) + if (IsOn(ExecLegion)) { bool compared = false; bool diffPC = false; @@ -323,6 +335,9 @@ Trace::InstRecord::dump() bool diffTlb = false; Addr m5Pc, lgnPc; + if (!shared_data) + setupSharedData(); + // We took a trap on a micro-op... if (wasMicro && !staticInst->isMicroOp()) { @@ -686,110 +701,4 @@ Trace::InstRecord::dump() #endif } - -vector Trace::InstRecord::flags(NUM_BITS); -string Trace::InstRecord::trace_system; - -//////////////////////////////////////////////////////////////////////// -// -// Parameter space for per-cycle execution address tracing options. -// Derive from ParamContext so we can override checkParams() function. -// -class ExecutionTraceParamContext : public ParamContext -{ - public: - ExecutionTraceParamContext(const string &_iniSection) - : ParamContext(_iniSection) - { - } - - void checkParams(); // defined at bottom of file -}; - -ExecutionTraceParamContext exeTraceParams("exetrace"); - -Param exe_trace_spec(&exeTraceParams, "speculative", - "capture speculative instructions", true); - -Param exe_trace_print_cycle(&exeTraceParams, "print_cycle", - "print cycle number", true); -Param exe_trace_print_opclass(&exeTraceParams, "print_opclass", - "print op class", true); -Param exe_trace_print_thread(&exeTraceParams, "print_thread", - "print thread number", true); -Param exe_trace_print_effaddr(&exeTraceParams, "print_effaddr", - "print effective address", true); -Param exe_trace_print_data(&exeTraceParams, "print_data", - "print result data", true); -Param exe_trace_print_iregs(&exeTraceParams, "print_iregs", - "print all integer regs", false); -Param exe_trace_print_fetchseq(&exeTraceParams, "print_fetchseq", - "print fetch sequence number", false); -Param exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq", - "print correct-path sequence number", false); -Param exe_trace_print_reg_delta(&exeTraceParams, "print_reg_delta", - "print which registers changed to what", false); -Param exe_trace_pc_symbol(&exeTraceParams, "pc_symbol", - "Use symbols for the PC if available", true); -Param exe_trace_intel_format(&exeTraceParams, "intel_format", - "print trace in intel compatible format", false); -Param exe_trace_legion_lockstep(&exeTraceParams, "legion_lockstep", - "Compare sim state to legion state every cycle", - false); -Param exe_trace_system(&exeTraceParams, "trace_system", - "print trace of which system (client or server)", - "client"); - - -// -// Helper function for ExecutionTraceParamContext::checkParams() just -// to get us into the InstRecord namespace -// -void -Trace::InstRecord::setParams() -{ - flags[TRACE_MISSPEC] = exe_trace_spec; - - flags[PRINT_TICKS] = exe_trace_print_cycle; - flags[PRINT_OP_CLASS] = exe_trace_print_opclass; - flags[PRINT_THREAD_NUM] = exe_trace_print_thread; - flags[PRINT_RESULT_DATA] = exe_trace_print_effaddr; - flags[PRINT_EFF_ADDR] = exe_trace_print_data; - flags[PRINT_INT_REGS] = exe_trace_print_iregs; - flags[PRINT_FETCH_SEQ] = exe_trace_print_fetchseq; - flags[PRINT_CP_SEQ] = exe_trace_print_cp_seq; - flags[PRINT_REG_DELTA] = exe_trace_print_reg_delta; - flags[PC_SYMBOL] = exe_trace_pc_symbol; - flags[INTEL_FORMAT] = exe_trace_intel_format; - flags[LEGION_LOCKSTEP] = exe_trace_legion_lockstep; - trace_system = exe_trace_system; - - // If were going to be in lockstep with Legion - // Setup shared memory, and get otherwise ready - if (flags[LEGION_LOCKSTEP]) { - int shmfd = shmget('M' << 24 | getuid(), sizeof(SharedData), 0777); - if (shmfd < 0) - fatal("Couldn't get shared memory fd. Is Legion running?"); - - shared_data = (SharedData*)shmat(shmfd, NULL, SHM_RND); - if (shared_data == (SharedData*)-1) - fatal("Couldn't allocate shared memory"); - - if (shared_data->flags != OWN_M5) - fatal("Shared memory has invalid owner"); - - if (shared_data->version != VERSION) - fatal("Shared Data is wrong version! M5: %d Legion: %d", VERSION, - shared_data->version); - - // step legion forward one cycle so we can get register values - shared_data->flags = OWN_LEGION; - } -} - -void -ExecutionTraceParamContext::checkParams() -{ - Trace::InstRecord::setParams(); -} - +/* namespace Trace */ } diff --git a/src/cpu/exetrace.hh b/src/cpu/exetrace.hh index 95a142f3c..be10b4a6a 100644 --- a/src/cpu/exetrace.hh +++ b/src/cpu/exetrace.hh @@ -137,30 +137,6 @@ class InstRecord void setRegs(const IntRegFile ®s); void dump(); - - enum InstExecFlagBits { - TRACE_MISSPEC = 0, - PRINT_TICKS, - PRINT_OP_CLASS, - PRINT_THREAD_NUM, - PRINT_RESULT_DATA, - PRINT_EFF_ADDR, - PRINT_INT_REGS, - PRINT_FETCH_SEQ, - PRINT_CP_SEQ, - PRINT_REG_DELTA, - PC_SYMBOL, - INTEL_FORMAT, - LEGION_LOCKSTEP, - NUM_BITS - }; - - static std::vector flags; - static std::string trace_system; - - static void setParams(); - - static bool traceMisspec() { return flags[TRACE_MISSPEC]; } }; @@ -174,22 +150,19 @@ InstRecord::setRegs(const IntRegFile ®s) regs_valid = true; } -inline -InstRecord * -getInstRecord(Tick when, ThreadContext *tc, - const StaticInstPtr staticInst, +inline InstRecord * +getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr staticInst, Addr pc) { - if (DTRACE(InstExec) && - (InstRecord::traceMisspec() || !tc->misspeculating())) { - return new InstRecord(when, tc, staticInst, pc, - tc->misspeculating()); - } - - return NULL; -} + if (!IsOn(ExecEnable)) + return NULL; + if (!IsOn(ExecSpeculative) && tc->misspeculating()) + return NULL; + return new InstRecord(when, tc, staticInst, pc, tc->misspeculating()); } +/* namespace Trace */ } + #endif // __EXETRACE_HH__ diff --git a/src/python/m5/main.py b/src/python/m5/main.py index d42137264..25b52e830 100644 --- a/src/python/m5/main.py +++ b/src/python/m5/main.py @@ -160,33 +160,6 @@ add_option("--trace-file", metavar="FILE", default="cout", add_option("--trace-ignore", metavar="EXPR", action='append', split=':', help="Ignore EXPR sim objects") -# Execution Trace options -set_group("Execution Trace Options") -bool_option("speculative", default=True, - help="Don't capture speculative instructions") -bool_option("print-cycle", default=True, - help="Don't print cycle numbers in trace output") -bool_option("print-symbol", default=True, - help="Disable PC symbols in trace output") -bool_option("print-opclass", default=True, - help="Don't print op class type in trace output") -bool_option("print-thread", default=True, - help="Don't print thread number in trace output") -bool_option("print-effaddr", default=True, - help="Don't print effective address in trace output") -bool_option("print-data", default=True, - help="Don't print result data in trace output") -bool_option("print-iregs", default=False, - help="Print fetch sequence numbers in trace output") -bool_option("print-fetch-seq", default=False, - help="Print fetch sequence numbers in trace output") -bool_option("print-cpseq", default=False, - help="Print correct path sequence numbers in trace output") -#bool_option("print-reg-delta", default=False, -# help="Print which registers changed to what in trace output") -bool_option("legion-lock", default=False, - help="Compare simulator state with Legion simulator every cycle") - options = attrdict() arguments = [] @@ -330,20 +303,6 @@ def main(): for ignore in options.trace_ignore: internal.trace.ignore(ignore) - # set execution trace options - objects.ExecutionTrace.speculative = options.speculative - objects.ExecutionTrace.print_cycle = options.print_cycle - objects.ExecutionTrace.pc_symbol = options.print_symbol - objects.ExecutionTrace.print_opclass = options.print_opclass - objects.ExecutionTrace.print_thread = options.print_thread - objects.ExecutionTrace.print_effaddr = options.print_effaddr - objects.ExecutionTrace.print_data = options.print_data - objects.ExecutionTrace.print_iregs = options.print_iregs - objects.ExecutionTrace.print_fetchseq = options.print_fetch_seq - objects.ExecutionTrace.print_cpseq = options.print_cpseq - #objects.ExecutionTrace.print_reg_delta = options.print_reg_delta - objects.ExecutionTrace.legion_lockstep = options.legion_lock - sys.argv = arguments sys.path = [ os.path.dirname(sys.argv[0]) ] + sys.path diff --git a/src/python/m5/objects/Root.py b/src/python/m5/objects/Root.py index 81482c1de..c78ae6ccb 100644 --- a/src/python/m5/objects/Root.py +++ b/src/python/m5/objects/Root.py @@ -3,7 +3,6 @@ from m5.params import * from Serialize import Serialize from Serialize import Statreset from Statistics import Statistics -from ExeTrace import ExecutionTrace class Root(SimObject): type = 'Root' @@ -16,5 +15,4 @@ class Root(SimObject): # stats = Param.Statistics(Statistics(), "statistics object") # serialize = Param.Serialize(Serialize(), "checkpoint generation options") stats = Statistics() - exetrace = ExecutionTrace() serialize = Serialize()