From: Luke Kenneth Casson Leighton Date: Thu, 1 Nov 2018 12:13:13 +0000 (+0000) Subject: reduce fp ops down to op width X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d8d0c5121261287f68b48a7202ac065750453c8e;p=riscv-isa-sim.git reduce fp ops down to op width --- diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc index fee135c..47ae9c9 100644 --- a/riscv/sv_insn_redirect.cc +++ b/riscv/sv_insn_redirect.cc @@ -119,7 +119,8 @@ union freg_shift { void (sv_proc_t::DO_WRITE_FREG)(reg_spec_t const& spec, sv_freg_t const& value) { - int flen = sizeof(freg_t) * 8; // FLEN (not specified in spike) + //int flen = sizeof(freg_t) * 8; // FLEN (not specified in spike) + int flen = _insn->flen; reg_t reg = spec.reg; uint8_t dest_elwidth = _insn->reg_elwidth(reg, false); int bitwidth = get_bitwidth(dest_elwidth, flen); @@ -215,7 +216,8 @@ void (sv_proc_t::WRITE_REG)(reg_spec_t const& spec, sv_reg_t const& value) freg_t (sv_proc_t::READ_FREG)(reg_spec_t const& spec) { - int flen = sizeof(freg_t) * 8; // FLEN (not specified in spike) + //int flen = sizeof(freg_t) * 8; // FLEN (not specified in spike) + int flen = _insn->flen; reg_t reg = spec.reg; uint8_t elwidth = _insn->reg_elwidth(reg, false); int bitwidth = get_bitwidth(elwidth, flen);