From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 10 Jan 2022 16:09:54 +0000 (+0000)
Subject: increase addr_wid to 64 in TestRunnerBase. hm this should not
X-Git-Tag: sv_maxu_works-initial~570
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d8d8c3133c0f58436d97646df0d2e4f8feb72c2c;p=openpower-isa.git

increase addr_wid to 64 in TestRunnerBase. hm this should not
be importing from soc, openpower-isa should be entirely independent
---

diff --git a/src/openpower/test/runner.py b/src/openpower/test/runner.py
index 52091d92..fb0c8dbd 100644
--- a/src/openpower/test/runner.py
+++ b/src/openpower/test/runner.py
@@ -143,7 +143,7 @@ class TestRunnerBase(FHDLTestCase):
 
         pspec = TestMemPspec(ldst_ifacetype=ldst_ifacetype,
                              imem_ifacetype=imem_ifacetype,
-                             addr_wid=48,
+                             addr_wid=64,
                              mask_wid=8,
                              imem_reg_wid=64,
                              # wb_data_width=32,