From: lkcl <lkcl@web>
Date: Fri, 3 Jun 2022 07:46:46 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2003
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d8f65780d6db5ca66a0ea9db4db3ce33dbe22e22;p=libreriscv.git

---

diff --git a/openpower/sv/svp64_quirks.mdwn b/openpower/sv/svp64_quirks.mdwn
index eeea9655d..665781cd1 100644
--- a/openpower/sv/svp64_quirks.mdwn
+++ b/openpower/sv/svp64_quirks.mdwn
@@ -216,8 +216,10 @@ Consequently, when using a given instruction, it is necessary to look
 up in the ISA Tables whether it is 1P or 2P. caveat emptor!
 
 Also worth a special mention: all Load/Store operations are Twin-Predicated.
-In other words: one Predicate applies to the Array of Memory Addresses,
-whilst the other Predicate applies to the Array of Memory Data.
+The underlying key to understanding:
+
+* one Predicate applies to the Array of Memory *Addresses*,
+* the other Predicate applies to the Array of Memory *Data*.
 
 # CR weird instructions