From: lkcl Date: Tue, 22 Dec 2020 23:53:04 +0000 (+0000) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~1023 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d92a62e24a5a11dbeebdd8c6976ec7b0262757d2;p=libreriscv.git --- diff --git a/openpower/sv/svp_rewrite/svp64.mdwn b/openpower/sv/svp_rewrite/svp64.mdwn index 2bce37ac0..5f6c0f0f8 100644 --- a/openpower/sv/svp_rewrite/svp64.mdwn +++ b/openpower/sv/svp_rewrite/svp64.mdwn @@ -520,6 +520,7 @@ Note, again: this is *only* under svp64 prefixing. Standard v3.0B / v3.1B is *n ### Major opcode map (v3.0B) +This table is taken from v3.0B. Table 9: Primary Opcode Map (opcode bits 0:5) | 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111 @@ -535,7 +536,9 @@ Table 9: Primary Opcode Map (opcode bits 0:5) ### Suitable for svp64 -Table 9: Primary Opcode Map (opcode bits 0:5) +This is the same table containing v3.0B Primary Opcodes except those that make mo sense in a Vectorisation Context have been removed. These removed POs can, *in the SV Vector Context only*, be assigned to alternative (Vectorised-only) instruxtions, including future extensions. + +Note, again, to emphasise: outside of svp64 these opcodes **do not** change. When not prefixed with svp64 these opcodes **specifically** retain their v3.0B / v3.1B OpenPOWER Standard compliant meaning. | 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111 000 | | | | | | | | mulli | 000