From: lkcl <lkcl@web>
Date: Sat, 23 Jul 2022 13:20:39 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1075
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d948d153cbe0d59d7a6f44a2b393216210d6a863;p=libreriscv.git

---

diff --git a/docs/pypowersim.mdwn b/docs/pypowersim.mdwn
index b5d3d19ee..e40dbfdd8 100644
--- a/docs/pypowersim.mdwn
+++ b/docs/pypowersim.mdwn
@@ -31,7 +31,10 @@ at 4.8 ghz is only capable of 2,500 instructions per second.
 # Pypowersim - PowerISA Simulator
 
 Pypowersim is a PowerISA simulator written in Python. It includes
-the exact same RADIX MMU support as Microwatt.
+the **exact** same
+[RADIX MMU](https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/isa/radixmmu.py;hb=HEAD)
+support as
+[Microwatt](https://github.com/antonblanchard/microwatt/blob/master/mmu.vhdl).
 PowerISA binaries are decoded by an
 [ISA class instance](https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/isa/caller.py;hb=HEAD).
 ISACaller utilises compiled machine-readable Power ISA 3.0