From: Richard Earnshaw Date: Wed, 1 Sep 2004 12:49:30 +0000 (+0000) Subject: arm-cores.def (ARM_CORE): Add new field for the real name of the CPU. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d98a72fd4f5ea4ea6ea45fd5af277eaeaa181678;p=gcc.git arm-cores.def (ARM_CORE): Add new field for the real name of the CPU. * arm/arm-cores.def (ARM_CORE): Add new field for the real name of the CPU. (arm7tdmi-s): New CPU name. * arm/arm.c (ARM_CORE): Update for new format. * arm/arm.h (ARM_CORE): Likewise. * arm/gentune.sh: Update for extra field. * config.gcc: Likewise. * arm/arm-tune.md: Regenerate. * doc/invoke.texi: Document the real processor names for ARM cpus. From-SVN: r86884 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f5c3ca6983a..6846701f1c3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2004-09-01 Richard Earnshaw + + * arm/arm-cores.def (ARM_CORE): Add new field for the real name of the + CPU. + (arm7tdmi-s): New CPU name. + * arm/arm.c (ARM_CORE): Update for new format. + * arm/arm.h (ARM_CORE): Likewise. + * arm/gentune.sh: Update for extra field. + * config.gcc: Likewise. + * arm/arm-tune.md: Regenerate. + * doc/invoke.texi: Document the real processor names for ARM cpus. + 2004-09-01 Richard Earnshaw * arm/ieee754-df.S (aeabi_ul2d, aeabi_l2d, floatundidf) diff --git a/gcc/config.gcc b/gcc/config.gcc index 576694fbe02..aee83254a59 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -2266,10 +2266,16 @@ fi # See if it matches any of the entries in arm-cores.def eval "val=\$with_$which" if [ x"$val" = x ] \ - || grep "^ARM_CORE($val," \ + || grep "^ARM_CORE(\"$val\"," \ ${srcdir}/config/arm/arm-cores.def \ > /dev/null; then # Ok + new_val=`grep "^ARM_CORE(\"$val\"," \ + ${srcdir}/config/arm/arm-cores.def | \ + sed -e 's/^[^,]*,[ ]*//' | \ + sed -e 's/,.*$//'` + eval "with_$which=$new_val" + echo "For $val real value is $new_val" true else echo "Unknown CPU used in --with-$which=$val" 1>&2 diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def index be3ade3c1ad..957a22557a5 100644 --- a/gcc/config/arm/arm-cores.def +++ b/gcc/config/arm/arm-cores.def @@ -21,10 +21,10 @@ /* Before using #include to read this file, define a macro: - ARM_CORE(CORE_NAME, ARCH, FLAGS, COSTS) + ARM_CORE(CORE_NAME, CORE_IDENT, ARCH, FLAGS, COSTS) - The CORE_NAME is the name of the core, represented as an identifier - rather than a string constant. + The CORE_NAME is the name of the core, represented as a string constant. + The CORE_IDENT is the name of the core, represented as an identifier. ARCH is the architecture revision implemeted by the chip. FLAGS are the bitwise-or of the traits that apply to that core. This need not include flags implied by the architecture. @@ -36,77 +36,78 @@ Some tools assume no whitespace up to the first "," in each entry. */ /* V2/V2A Architecture Processors */ -ARM_CORE(arm2, 2, FL_CO_PROC | FL_MODE26, slowmul) -ARM_CORE(arm250, 2, FL_CO_PROC | FL_MODE26, slowmul) -ARM_CORE(arm3, 2, FL_CO_PROC | FL_MODE26, slowmul) +ARM_CORE("arm2", arm2, 2, FL_CO_PROC | FL_MODE26, slowmul) +ARM_CORE("arm250", arm250, 2, FL_CO_PROC | FL_MODE26, slowmul) +ARM_CORE("arm3", arm3, 2, FL_CO_PROC | FL_MODE26, slowmul) /* V3 Architecture Processors */ -ARM_CORE(arm6, 3, FL_CO_PROC | FL_MODE26, slowmul) -ARM_CORE(arm60, 3, FL_CO_PROC | FL_MODE26, slowmul) -ARM_CORE(arm600, 3, FL_CO_PROC | FL_MODE26, slowmul) -ARM_CORE(arm610, 3, FL_MODE26, slowmul) -ARM_CORE(arm620, 3, FL_CO_PROC | FL_MODE26, slowmul) -ARM_CORE(arm7, 3, FL_CO_PROC | FL_MODE26, slowmul) -ARM_CORE(arm7d, 3, FL_CO_PROC | FL_MODE26, slowmul) -ARM_CORE(arm7di, 3, FL_CO_PROC | FL_MODE26, slowmul) -ARM_CORE(arm70, 3, FL_CO_PROC | FL_MODE26, slowmul) -ARM_CORE(arm700, 3, FL_CO_PROC | FL_MODE26, slowmul) -ARM_CORE(arm700i, 3, FL_CO_PROC | FL_MODE26, slowmul) -ARM_CORE(arm710, 3, FL_MODE26, slowmul) -ARM_CORE(arm720, 3, FL_MODE26, slowmul) -ARM_CORE(arm710c, 3, FL_MODE26, slowmul) -ARM_CORE(arm7100, 3, FL_MODE26, slowmul) -ARM_CORE(arm7500, 3, FL_MODE26, slowmul) +ARM_CORE("arm6", arm6, 3, FL_CO_PROC | FL_MODE26, slowmul) +ARM_CORE("arm60", arm60, 3, FL_CO_PROC | FL_MODE26, slowmul) +ARM_CORE("arm600", arm600, 3, FL_CO_PROC | FL_MODE26, slowmul) +ARM_CORE("arm610", arm610, 3, FL_MODE26, slowmul) +ARM_CORE("arm620", arm620, 3, FL_CO_PROC | FL_MODE26, slowmul) +ARM_CORE("arm7", arm7, 3, FL_CO_PROC | FL_MODE26, slowmul) +ARM_CORE("arm7d", arm7d, 3, FL_CO_PROC | FL_MODE26, slowmul) +ARM_CORE("arm7di", arm7di, 3, FL_CO_PROC | FL_MODE26, slowmul) +ARM_CORE("arm70", arm70, 3, FL_CO_PROC | FL_MODE26, slowmul) +ARM_CORE("arm700", arm700, 3, FL_CO_PROC | FL_MODE26, slowmul) +ARM_CORE("arm700i", arm700i, 3, FL_CO_PROC | FL_MODE26, slowmul) +ARM_CORE("arm710", arm710, 3, FL_MODE26, slowmul) +ARM_CORE("arm720", arm720, 3, FL_MODE26, slowmul) +ARM_CORE("arm710c", arm710c, 3, FL_MODE26, slowmul) +ARM_CORE("arm7100", arm7100, 3, FL_MODE26, slowmul) +ARM_CORE("arm7500", arm7500, 3, FL_MODE26, slowmul) /* Doesn't have an external co-proc, but does have embedded fpa. */ -ARM_CORE(arm7500fe, 3, FL_CO_PROC | FL_MODE26, slowmul) +ARM_CORE("arm7500fe", arm7500fe, 3, FL_CO_PROC | FL_MODE26, slowmul) /* V3M Architecture Processors */ -/* arm7m doesn't exist on its own, but only with D, (and I), but +/* arm7m doesn't exist on its own, but only with D, ("and", and I), but those don't alter the code, so arm7m is sometimes used. */ -ARM_CORE(arm7m, 3M, FL_CO_PROC | FL_MODE26, fastmul) -ARM_CORE(arm7dm, 3M, FL_CO_PROC | FL_MODE26, fastmul) -ARM_CORE(arm7dmi, 3M, FL_CO_PROC | FL_MODE26, fastmul) +ARM_CORE("arm7m", arm7m, 3M, FL_CO_PROC | FL_MODE26, fastmul) +ARM_CORE("arm7dm", arm7dm, 3M, FL_CO_PROC | FL_MODE26, fastmul) +ARM_CORE("arm7dmi", arm7dmi, 3M, FL_CO_PROC | FL_MODE26, fastmul) /* V4 Architecture Processors */ -ARM_CORE(arm8, 4, FL_MODE26 | FL_LDSCHED, fastmul) -ARM_CORE(arm810, 4, FL_MODE26 | FL_LDSCHED, fastmul) -ARM_CORE(strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) -ARM_CORE(strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) -ARM_CORE(strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) -ARM_CORE(strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) +ARM_CORE("arm8", arm8, 4, FL_MODE26 | FL_LDSCHED, fastmul) +ARM_CORE("arm810", arm810, 4, FL_MODE26 | FL_LDSCHED, fastmul) +ARM_CORE("strongarm", strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) +ARM_CORE("strongarm110", strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) +ARM_CORE("strongarm1100", strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) +ARM_CORE("strongarm1110", strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) /* V4T Architecture Processors */ -ARM_CORE(arm7tdmi, 4T, FL_CO_PROC , fastmul) -ARM_CORE(arm710t, 4T, 0 , fastmul) -ARM_CORE(arm720t, 4T, 0 , fastmul) -ARM_CORE(arm740t, 4T, 0 , fastmul) -ARM_CORE(arm9, 4T, FL_LDSCHED, fastmul) -ARM_CORE(arm9tdmi, 4T, FL_LDSCHED, fastmul) -ARM_CORE(arm920, 4T, FL_LDSCHED, fastmul) -ARM_CORE(arm920t, 4T, FL_LDSCHED, fastmul) -ARM_CORE(arm922t, 4T, FL_LDSCHED, fastmul) -ARM_CORE(arm940t, 4T, FL_LDSCHED, fastmul) -ARM_CORE(ep9312, 4T, FL_LDSCHED | FL_CIRRUS, fastmul) +ARM_CORE("arm7tdmi", arm7tdmi, 4T, FL_CO_PROC , fastmul) +ARM_CORE("arm7tdmi-s", arm7tdmis, 4T, FL_CO_PROC , fastmul) +ARM_CORE("arm710t", arm710t, 4T, 0 , fastmul) +ARM_CORE("arm720t", arm720t, 4T, 0 , fastmul) +ARM_CORE("arm740t", arm740t, 4T, 0 , fastmul) +ARM_CORE("arm9", arm9, 4T, FL_LDSCHED, fastmul) +ARM_CORE("arm9tdmi", arm9tdmi, 4T, FL_LDSCHED, fastmul) +ARM_CORE("arm920", arm920, 4T, FL_LDSCHED, fastmul) +ARM_CORE("arm920t", arm920t, 4T, FL_LDSCHED, fastmul) +ARM_CORE("arm922t", arm922t, 4T, FL_LDSCHED, fastmul) +ARM_CORE("arm940t", arm940t, 4T, FL_LDSCHED, fastmul) +ARM_CORE("ep9312", ep9312, 4T, FL_LDSCHED | FL_CIRRUS, fastmul) /* V5T Architecture Processors */ -ARM_CORE(arm10tdmi, 5T, FL_LDSCHED, fastmul) -ARM_CORE(arm1020t, 5T, FL_LDSCHED, fastmul) +ARM_CORE("arm10tdmi", arm10tdmi, 5T, FL_LDSCHED, fastmul) +ARM_CORE("arm1020t", arm1020t, 5T, FL_LDSCHED, fastmul) /* V5TE Architecture Processors */ -ARM_CORE(arm9e, 5TE, FL_LDSCHED, 9e) -ARM_CORE(arm946es, 5TE, FL_LDSCHED, 9e) -ARM_CORE(arm966es, 5TE, FL_LDSCHED, 9e) -ARM_CORE(arm968es, 5TE, FL_LDSCHED, 9e) -ARM_CORE(arm10e, 5TE, FL_LDSCHED, fastmul) -ARM_CORE(arm1020e, 5TE, FL_LDSCHED, fastmul) -ARM_CORE(arm1022e, 5TE, FL_LDSCHED, fastmul) -ARM_CORE(xscale, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE, xscale) -ARM_CORE(iwmmxt, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale) +ARM_CORE("arm9e", arm9e, 5TE, FL_LDSCHED, 9e) +ARM_CORE("arm946e-s", arm946es, 5TE, FL_LDSCHED, 9e) +ARM_CORE("arm966e-s", arm966es, 5TE, FL_LDSCHED, 9e) +ARM_CORE("arm968e-s", arm968es, 5TE, FL_LDSCHED, 9e) +ARM_CORE("arm10e", arm10e, 5TE, FL_LDSCHED, fastmul) +ARM_CORE("arm1020e", arm1020e, 5TE, FL_LDSCHED, fastmul) +ARM_CORE("arm1022e", arm1022e, 5TE, FL_LDSCHED, fastmul) +ARM_CORE("xscale", xscale, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE, xscale) +ARM_CORE("iwmmxt", iwmmxt, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale) /* V5TEJ Architecture Processors */ -ARM_CORE(arm926ejs, 5TEJ, 0, 9e) -ARM_CORE(arm1026ejs, 5TEJ, 0, 9e) +ARM_CORE("arm926ej-s", arm926ejs, 5TEJ, 0, 9e) +ARM_CORE("arm1026ej-s", arm1026ejs, 5TEJ, 0, 9e) /* V6 Architecture Processors */ -ARM_CORE(arm1136js, 6J, 0, 9e) -ARM_CORE(arm1136jfs, 6J, FL_VFPV2, 9e) +ARM_CORE("arm1136j-s", arm1136js, 6J, 0, 9e) +ARM_CORE("arm1136jf-s", arm1136jfs, 6J, FL_VFPV2, 9e) diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md index 8bdfd20e162..a457df375cb 100644 --- a/gcc/config/arm/arm-tune.md +++ b/gcc/config/arm/arm-tune.md @@ -1,5 +1,5 @@ ;; -*- buffer-read-only: t -*- ;; Generated automatically by gentune.sh from arm-cores.def (define_attr "tune" - "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,arm7tdmi,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,arm926ejs,arm1026ejs,arm1136js,arm1136jfs" + "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,arm926ejs,arm1026ejs,arm1136js,arm1136jfs" (const (symbol_ref "arm_tune"))) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 52566be805a..c2617052d7c 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -500,8 +500,8 @@ struct processors static const struct processors all_cores[] = { /* ARM Cores */ -#define ARM_CORE(NAME, ARCH, FLAGS, COSTS) \ - {#NAME, arm_none, #ARCH, FLAGS | FL_FOR_ARCH##ARCH, arm_##COSTS##_rtx_costs}, +#define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \ + {NAME, arm_none, #ARCH, FLAGS | FL_FOR_ARCH##ARCH, arm_##COSTS##_rtx_costs}, #include "arm-cores.def" #undef ARM_CORE {NULL, arm_none, NULL, 0, NULL} diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 37bda83091a..735b182c86b 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -83,8 +83,8 @@ extern char arm_arch_name[]; /* The various ARM cores. */ enum processor_type { -#define ARM_CORE(NAME, ARCH, FLAGS, COSTS) \ - NAME, +#define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \ + IDENT, #include "arm-cores.def" #undef ARM_CORE /* Used to indicate that no processor has been specified. */ @@ -93,8 +93,8 @@ enum processor_type enum target_cpus { -#define ARM_CORE(NAME, ARCH, FLAGS, COSTS) \ - TARGET_CPU_##NAME, +#define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \ + TARGET_CPU_##IDENT, #include "arm-cores.def" #undef ARM_CORE TARGET_CPU_generic diff --git a/gcc/config/arm/gentune.sh b/gcc/config/arm/gentune.sh index 74cc8533a11..40c05411052 100755 --- a/gcc/config/arm/gentune.sh +++ b/gcc/config/arm/gentune.sh @@ -5,7 +5,7 @@ echo ";; -*- buffer-read-only: t -*-" echo ";; Generated automatically by gentune.sh from arm-cores.def" -allcores=`awk -F'[(,]' '/^ARM_CORE/ { cores = cores$2"," } END { print cores } ' $1` +allcores=`awk -F'[(, ]+' '/^ARM_CORE/ { cores = cores$3"," } END { print cores } ' $1` echo "(define_attr \"tune\"" echo " \"$allcores\"" | sed -e 's/,"$/"/' diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 33b67b78021..96b0fcea791 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -6595,14 +6595,14 @@ assembly code. Permissible names are: @samp{arm2}, @samp{arm250}, @samp{arm620}, @samp{arm7}, @samp{arm7m}, @samp{arm7d}, @samp{arm7dm}, @samp{arm7di}, @samp{arm7dmi}, @samp{arm70}, @samp{arm700}, @samp{arm700i}, @samp{arm710}, @samp{arm710c}, @samp{arm7100}, -@samp{arm7500}, @samp{arm7500fe}, @samp{arm7tdmi}, @samp{arm8}, -@samp{strongarm}, @samp{strongarm110}, @samp{strongarm1100}, +@samp{arm7500}, @samp{arm7500fe}, @samp{arm7tdmi}, @samp{arm7tdmi-s}, +@samp{arm8}, @samp{strongarm}, @samp{strongarm110}, @samp{strongarm1100}, @samp{arm8}, @samp{arm810}, @samp{arm9}, @samp{arm9e}, @samp{arm920}, -@samp{arm920t}, @samp{arm922t}, @samp{arm946es}, @samp{arm966es}, -@samp{arm968es}, @samp{arm926ejs}, @samp{arm940t}, @samp{arm9tdmi}, -@samp{arm10tdmi}, @samp{arm1020t}, @samp{arm1026ejs}, +@samp{arm920t}, @samp{arm922t}, @samp{arm946e-s}, @samp{arm966e-s}, +@samp{arm968e-s}, @samp{arm926ej-s}, @samp{arm940t}, @samp{arm9tdmi}, +@samp{arm10tdmi}, @samp{arm1020t}, @samp{arm1026ej-s}, @samp{arm10e}, @samp{arm1020e}, @samp{arm1022e}, -@samp{arm1136js}, @samp{arm1136jfs} ,@samp{xscale}, @samp{iwmmxt}, +@samp{arm1136j-s}, @samp{arm1136jf-s} ,@samp{xscale}, @samp{iwmmxt}, @samp{ep9312}. @itemx -mtune=@var{name}