From: H.J. Lu Date: Tue, 28 Aug 2007 17:36:34 +0000 (+0000) Subject: gas/ X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d9a5e5e5c91086a8dd66174a7ebff52c00efe79e;p=binutils-gdb.git gas/ 2007-08-28 H.J. Lu * config/tc-i386.c (process_suffix): Handle cmpxchg8b in Intel mode. gas/testsuite/ 2007-08-28 H.J. Lu * gas/i386/mem.s: New. Add tests for instructions with one memory operand. * gas/i386/x86-64-mem.s: Likewise. * gas/i386/mem-intel.d: Updated. * gas/i386/mem.d: Likewise. * gas/i386/x86-64-mem-intel.d: Likewise. * gas/i386/x86-64-mem.d: Likewise. opcodes/ 2007-08-28 H.J. Lu * i386-dis.c (Md): New. (grps): Use 0 on invlpg. Use M on fxsave and fxrstor. Use Md on ldmxcsr and stmxcsr. Use b_mode on clflush. (OP_0fae): Clear bytemode for sfence. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index 71276d45b7a..12d3e5c9729 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2007-08-28 H.J. Lu + + * config/tc-i386.c (process_suffix): Handle cmpxchg8b in + Intel mode. + 2007-08-28 Nathan Sidwell * config/tc-m68k.c (mcf52235_ctrl): Add cache registers. @@ -11,7 +16,7 @@ (m68k_cpus): Define 51QE cpu. 2007-08-28 Mark Shinwell - Joseph Myers + Joseph Myers * as.c (main): Flush stderr before printing listings to ensure consistent output order across platforms. @@ -21,7 +26,7 @@ * configure.tgt: Add support for i[3-7]86-*-dragonfly*. 2007-08-24 Joseph Myers - Paul Brook + Paul Brook * remap.c: New. * as.h (remap_debug_filename, add_debug_prefix_map): Declare. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 16376dccdfa..0f6396ff036 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -3032,11 +3032,17 @@ process_suffix (void) && (i.tm.opcode_modifier & NoRex64) == 0) { /* Special case for xchg %rax,%rax. It is NOP and doesn't - need rex64. */ - if (i.operands != 2 - || i.types [0] != (Acc | Reg64) - || i.types [1] != (Acc | Reg64) - || i.tm.base_opcode != 0x90) + need rex64. cmpxchg8b is also a special case. */ + if (! (i.operands == 2 + && i.tm.base_opcode == 0x90 + && i.tm.extension_opcode == None + && i.types [0] == (Acc | Reg64) + && i.types [1] == (Acc | Reg64)) + && ! (i.operands == 1 + && i.tm.base_opcode == 0xfc7 + && i.tm.extension_opcode == 1 + && (i.types [0] & Reg) == 0 + && (i.types [0] & AnyMem) != 0)) i.rex |= REX_W; } diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 1d196d06d4a..628b2d98938 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,5 +1,16 @@ +2007-08-28 H.J. Lu + + * gas/i386/mem.s: New. Add tests for instructions with one + memory operand. + * gas/i386/x86-64-mem.s: Likewise. + + * gas/i386/mem-intel.d: Updated. + * gas/i386/mem.d: Likewise. + * gas/i386/x86-64-mem-intel.d: Likewise. + * gas/i386/x86-64-mem.d: Likewise. + 2007-08-28 Mark Shinwell - Joseph Myers + Joseph Myers * lib/gas-defs.exp (gas_version): Use remote_* functions instead of exec. diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index f68ab81b0c5..be5e677419d 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -88,6 +88,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_list_test "inval-crc32" "-al" run_dump_test "simd" run_dump_test "simd-intel" + run_dump_test "mem" + run_dump_test "mem-intel" # These tests require support for 8 and 16 bit relocs, # so we only run them for ELF and COFF targets. @@ -187,6 +189,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_list_test "x86-64-inval-crc32" "-al" run_dump_test "x86-64-simd" run_dump_test "x86-64-simd-intel" + run_dump_test "x86-64-mem" + run_dump_test "x86-64-mem-intel" if { ![istarget "*-*-aix*"] && ![istarget "*-*-beos*"] diff --git a/gas/testsuite/gas/i386/mem-intel.d b/gas/testsuite/gas/i386/mem-intel.d new file mode 100644 index 00000000000..10968f1f5bc --- /dev/null +++ b/gas/testsuite/gas/i386/mem-intel.d @@ -0,0 +1,41 @@ +#source: mem.s +#as: -J +#objdump: -dw -Mintel +#name: i386 mem (Intel mode) + +.*: +file format .* + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: 0f 01 06 sgdtd \[esi\] +[ ]*[a-f0-9]+: 0f 01 0e sidtd \[esi\] +[ ]*[a-f0-9]+: 0f 01 16 lgdtd \[esi\] +[ ]*[a-f0-9]+: 0f 01 1e lidtd \[esi\] +[ ]*[a-f0-9]+: 0f 01 3e invlpg \[esi\] +[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[esi\] +[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[esi\] +[ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[esi\] +[ ]*[a-f0-9]+: f3 0f c7 36 vmxon QWORD PTR \[esi\] +[ ]*[a-f0-9]+: 0f c7 3e vmptrst QWORD PTR \[esi\] +[ ]*[a-f0-9]+: 0f ae 06 fxsave \[esi\] +[ ]*[a-f0-9]+: 0f ae 0e fxrstor \[esi\] +[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[esi\] +[ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[esi\] +[ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[esi\] +[ ]*[a-f0-9]+: 0f 01 06 sgdtd \[esi\] +[ ]*[a-f0-9]+: 0f 01 0e sidtd \[esi\] +[ ]*[a-f0-9]+: 0f 01 16 lgdtd \[esi\] +[ ]*[a-f0-9]+: 0f 01 1e lidtd \[esi\] +[ ]*[a-f0-9]+: 0f 01 3e invlpg \[esi\] +[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[esi\] +[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[esi\] +[ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[esi\] +[ ]*[a-f0-9]+: f3 0f c7 36 vmxon QWORD PTR \[esi\] +[ ]*[a-f0-9]+: 0f c7 3e vmptrst QWORD PTR \[esi\] +[ ]*[a-f0-9]+: 0f ae 06 fxsave \[esi\] +[ ]*[a-f0-9]+: 0f ae 0e fxrstor \[esi\] +[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[esi\] +[ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[esi\] +[ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[esi\] +#pass diff --git a/gas/testsuite/gas/i386/mem.d b/gas/testsuite/gas/i386/mem.d new file mode 100644 index 00000000000..312d6bdab72 --- /dev/null +++ b/gas/testsuite/gas/i386/mem.d @@ -0,0 +1,39 @@ +#objdump: -dw +#name: i386 mem + +.*: file format .* + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: 0f 01 06 sgdtl \(%esi\) +[ ]*[a-f0-9]+: 0f 01 0e sidtl \(%esi\) +[ ]*[a-f0-9]+: 0f 01 16 lgdtl \(%esi\) +[ ]*[a-f0-9]+: 0f 01 1e lidtl \(%esi\) +[ ]*[a-f0-9]+: 0f 01 3e invlpg \(%esi\) +[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b \(%esi\) +[ ]*[a-f0-9]+: 0f c7 36 vmptrld \(%esi\) +[ ]*[a-f0-9]+: 66 0f c7 36 vmclear \(%esi\) +[ ]*[a-f0-9]+: f3 0f c7 36 vmxon \(%esi\) +[ ]*[a-f0-9]+: 0f c7 3e vmptrst \(%esi\) +[ ]*[a-f0-9]+: 0f ae 06 fxsave \(%esi\) +[ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%esi\) +[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%esi\) +[ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%esi\) +[ ]*[a-f0-9]+: 0f ae 3e clflush \(%esi\) +[ ]*[a-f0-9]+: 0f 01 06 sgdtl \(%esi\) +[ ]*[a-f0-9]+: 0f 01 0e sidtl \(%esi\) +[ ]*[a-f0-9]+: 0f 01 16 lgdtl \(%esi\) +[ ]*[a-f0-9]+: 0f 01 1e lidtl \(%esi\) +[ ]*[a-f0-9]+: 0f 01 3e invlpg \(%esi\) +[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b \(%esi\) +[ ]*[a-f0-9]+: 0f c7 36 vmptrld \(%esi\) +[ ]*[a-f0-9]+: 66 0f c7 36 vmclear \(%esi\) +[ ]*[a-f0-9]+: f3 0f c7 36 vmxon \(%esi\) +[ ]*[a-f0-9]+: 0f c7 3e vmptrst \(%esi\) +[ ]*[a-f0-9]+: 0f ae 06 fxsave \(%esi\) +[ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%esi\) +[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%esi\) +[ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%esi\) +[ ]*[a-f0-9]+: 0f ae 3e clflush \(%esi\) +#pass diff --git a/gas/testsuite/gas/i386/mem.s b/gas/testsuite/gas/i386/mem.s new file mode 100644 index 00000000000..7895beb2cd7 --- /dev/null +++ b/gas/testsuite/gas/i386/mem.s @@ -0,0 +1,39 @@ +# Check instructions with one memory operand + + .text +_start: + +sgdt (%esi) +sidt (%esi) +lgdt (%esi) +lidt (%esi) +invlpg (%esi) +cmpxchg8b (%esi) +vmptrld (%esi) +vmclear (%esi) +vmxon (%esi) +vmptrst (%esi) +fxsave (%esi) +fxrstor (%esi) +ldmxcsr (%esi) +stmxcsr (%esi) +clflush (%esi) + +.intel_syntax noprefix +sgdt [esi] +sidt [esi] +lgdt [esi] +lidt [esi] +invlpg [esi] +cmpxchg8b qword ptr [esi] +vmptrld qword ptr [esi] +vmclear qword ptr [esi] +vmxon qword ptr [esi] +vmptrst qword ptr [esi] +fxsave [esi] +fxrstor [esi] +ldmxcsr dword ptr [esi] +stmxcsr dword ptr [esi] +clflush byte ptr [esi] + +.p2align 4,0 diff --git a/gas/testsuite/gas/i386/x86-64-mem-intel.d b/gas/testsuite/gas/i386/x86-64-mem-intel.d new file mode 100644 index 00000000000..7d0eb97097b --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mem-intel.d @@ -0,0 +1,43 @@ +#source: x86-64-mem.s +#as: -J +#objdump: -dw -Mintel +#name: x86-64 mem (Intel mode) + +.*: +file format .* + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: 0f 01 06 sgdt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 0e sidt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 16 lgdt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 1e lidt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 3e invlpg \[rsi\] +[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b OWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: f3 0f c7 36 vmxon QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f c7 3e vmptrst QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f ae 06 fxsave \[rsi\] +[ ]*[a-f0-9]+: 0f ae 0e fxrstor \[rsi\] +[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[rsi\] +[ ]*[a-f0-9]+: 0f 01 06 sgdt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 0e sidt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 16 lgdt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 1e lidt \[rsi\] +[ ]*[a-f0-9]+: 0f 01 3e invlpg \[rsi\] +[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b OWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: f3 0f c7 36 vmxon QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f c7 3e vmptrst QWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f ae 06 fxsave \[rsi\] +[ ]*[a-f0-9]+: 0f ae 0e fxrstor \[rsi\] +[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[rsi\] +[ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[rsi\] +#pass diff --git a/gas/testsuite/gas/i386/x86-64-mem.d b/gas/testsuite/gas/i386/x86-64-mem.d new file mode 100644 index 00000000000..863b6a30431 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mem.d @@ -0,0 +1,42 @@ +#as: -J +#objdump: -dw +#name: x86-64 mem + +.*: +file format .* + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: 0f 01 06 sgdt \(%rsi\) +[ ]*[a-f0-9]+: 0f 01 0e sidt \(%rsi\) +[ ]*[a-f0-9]+: 0f 01 16 lgdt \(%rsi\) +[ ]*[a-f0-9]+: 0f 01 1e lidt \(%rsi\) +[ ]*[a-f0-9]+: 0f 01 3e invlpg \(%rsi\) +[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b \(%rsi\) +[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\) +[ ]*[a-f0-9]+: 0f c7 36 vmptrld \(%rsi\) +[ ]*[a-f0-9]+: 66 0f c7 36 vmclear \(%rsi\) +[ ]*[a-f0-9]+: f3 0f c7 36 vmxon \(%rsi\) +[ ]*[a-f0-9]+: 0f c7 3e vmptrst \(%rsi\) +[ ]*[a-f0-9]+: 0f ae 06 fxsave \(%rsi\) +[ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%rsi\) +[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%rsi\) +[ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%rsi\) +[ ]*[a-f0-9]+: 0f ae 3e clflush \(%rsi\) +[ ]*[a-f0-9]+: 0f 01 06 sgdt \(%rsi\) +[ ]*[a-f0-9]+: 0f 01 0e sidt \(%rsi\) +[ ]*[a-f0-9]+: 0f 01 16 lgdt \(%rsi\) +[ ]*[a-f0-9]+: 0f 01 1e lidt \(%rsi\) +[ ]*[a-f0-9]+: 0f 01 3e invlpg \(%rsi\) +[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b \(%rsi\) +[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\) +[ ]*[a-f0-9]+: 0f c7 36 vmptrld \(%rsi\) +[ ]*[a-f0-9]+: 66 0f c7 36 vmclear \(%rsi\) +[ ]*[a-f0-9]+: f3 0f c7 36 vmxon \(%rsi\) +[ ]*[a-f0-9]+: 0f c7 3e vmptrst \(%rsi\) +[ ]*[a-f0-9]+: 0f ae 06 fxsave \(%rsi\) +[ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%rsi\) +[ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%rsi\) +[ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%rsi\) +[ ]*[a-f0-9]+: 0f ae 3e clflush \(%rsi\) +#pass diff --git a/gas/testsuite/gas/i386/x86-64-mem.s b/gas/testsuite/gas/i386/x86-64-mem.s new file mode 100644 index 00000000000..7edba80f088 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mem.s @@ -0,0 +1,41 @@ +# Check 64bit instructions with one memory operand + + .text +_start: + +sgdt (%rsi) +sidt (%rsi) +lgdt (%rsi) +lidt (%rsi) +invlpg (%rsi) +cmpxchg8b (%rsi) +cmpxchg16b (%rsi) +vmptrld (%rsi) +vmclear (%rsi) +vmxon (%rsi) +vmptrst (%rsi) +fxsave (%rsi) +fxrstor (%rsi) +ldmxcsr (%rsi) +stmxcsr (%rsi) +clflush (%rsi) + +.intel_syntax noprefix +sgdt [rsi] +sidt [rsi] +lgdt [rsi] +lidt [rsi] +invlpg [rsi] +cmpxchg8b qword ptr [rsi] +cmpxchg16b oword ptr [rsi] +vmptrld qword ptr [rsi] +vmclear qword ptr [rsi] +vmxon qword ptr [rsi] +vmptrst qword ptr [rsi] +fxsave [rsi] +fxrstor [rsi] +ldmxcsr dword ptr [rsi] +stmxcsr dword ptr [rsi] +clflush byte ptr [rsi] + +.p2align 4,0 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index e9c9b982141..5950e266de5 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2007-08-28 H.J. Lu + + * i386-dis.c (Md): New. + (grps): Use 0 on invlpg. Use M on fxsave and fxrstor. Use + Md on ldmxcsr and stmxcsr. Use b_mode on clflush. + (OP_0fae): Clear bytemode for sfence. + 2007-08-22 Ben Elliston * ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 4058dce8792..b6ece0f8ee1 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -215,6 +215,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define Ew { OP_E, w_mode } #define M { OP_M, 0 } /* lea, lgdt, etc. */ #define Ma { OP_M, v_mode } +#define Md { OP_M, d_mode } #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */ #define Mq { OP_M, q_mode } #define Gb { OP_G, b_mode } @@ -1702,7 +1703,7 @@ static const struct dis386 grps[][8] = { { "smswD", { Sv } }, { "(bad)", { XX } }, { "lmsw", { Ew } }, - { "invlpg", { { INVLPG_Fixup, w_mode } } }, + { "invlpg", { { INVLPG_Fixup, 0 } } }, }, /* GRP8 */ { @@ -1783,14 +1784,14 @@ static const struct dis386 grps[][8] = { }, /* GRP15 */ { - { "fxsave", { Ev } }, - { "fxrstor", { Ev } }, - { "ldmxcsr", { Ev } }, - { "stmxcsr", { Ev } }, + { "fxsave", { M } }, + { "fxrstor", { M } }, + { "ldmxcsr", { Md } }, + { "stmxcsr", { Md } }, { "(bad)", { XX } }, { "lfence", { { OP_0fae, 0 } } }, { "mfence", { { OP_0fae, 0 } } }, - { "clflush", { { OP_0fae, 0 } } }, + { "clflush", { { OP_0fae, b_mode } } }, }, /* GRP16 */ { @@ -5908,7 +5909,11 @@ OP_0fae (int bytemode, int sizeflag) if (modrm.mod == 3) { if (modrm.reg == 7) - strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence"); + { + bytemode = 0; + strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, + "sfence"); + } if (modrm.reg < 5 || modrm.rm != 0) {