From: Timothy Hayes Date: Wed, 23 Sep 2020 13:39:46 +0000 (+0100) Subject: arch-arm: Instantiate a single HTM checkpoint at ISA::startup X-Git-Tag: v20.1.0.0~12 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d9d4203e04d9d027c3d6c0d7eed1af89ebd4574a;p=gem5.git arch-arm: Instantiate a single HTM checkpoint at ISA::startup Change-Id: I48cc71dce607233f025387379507bcd485943dde Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35016 Reviewed-by: Jason Lowe-Power Maintainer: Giacomo Travaglini Tested-by: kokoro --- diff --git a/src/arch/arm/insts/tme64ruby.cc b/src/arch/arm/insts/tme64ruby.cc index 99481ba43..f8d948197 100644 --- a/src/arch/arm/insts/tme64ruby.cc +++ b/src/arch/arm/insts/tme64ruby.cc @@ -109,15 +109,16 @@ Tstart64::completeAcc(PacketPtr pkt, ExecContext *xc, // checkpointing occurs in the outer transaction only if (htm_depth == 1) { - auto new_cpt = new HTMCheckpoint(); + BaseHTMCheckpointPtr& cpt = xc->tcBase()->getHtmCheckpointPtr(); - new_cpt->save(tc); - new_cpt->destinationRegister(dest); + HTMCheckpoint *armcpt = + dynamic_cast(cpt.get()); + assert(armcpt != nullptr); - ArmISA::globalClearExclusive(tc); + armcpt->save(tc); + armcpt->destinationRegister(dest); - xc->tcBase()->setHtmCheckpointPtr( - std::unique_ptr(new_cpt)); + ArmISA::globalClearExclusive(tc); } xc->setIntRegOperand(this, 0, (Dest64) & mask(intWidth)); diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc index 9ace2367f..4ad1125eb 100644 --- a/src/arch/arm/isa.cc +++ b/src/arch/arm/isa.cc @@ -38,6 +38,7 @@ #include "arch/arm/isa.hh" #include "arch/arm/faults.hh" +#include "arch/arm/htm.hh" #include "arch/arm/interrupts.hh" #include "arch/arm/pmu.hh" #include "arch/arm/self_debug.hh" @@ -439,9 +440,15 @@ ISA::startup() { BaseISA::startup(); - if (tc) + if (tc) { setupThreadContext(); + if (haveTME) { + std::unique_ptr cpt(new HTMCheckpoint()); + tc->setHtmCheckpointPtr(std::move(cpt)); + } + } + afterStartup = true; }