From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 31 Dec 2021 15:59:30 +0000 (+0000)
Subject: more README whitespace
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d9f19ddb4022d2a37a72ffb3578e291142c92dc9;p=nmigen.git

more README whitespace
---

diff --git a/README.md b/README.md
index fb0bc3b..d047ffd 100644
--- a/README.md
+++ b/README.md
@@ -84,7 +84,8 @@ behavioral Verilog-2001 as input. It also offers extended support for
 many FPGA families, providing toolchain integration, abstractions for
 device-specific primitives, and more. Specifically:
 
-  * Lattice iCE40 (toolchains: **Yosys+nextpnr**, LSE-iCECube2, Synplify-iCECube2);
+  * Lattice iCE40 (toolchains: **Yosys+nextpnr**, LSE-iCECube2,
+    Synplify-iCECube2);
   * Lattice MachXO2 (toolchains: Diamond);
   * Lattice MachXO3L (toolchains: Diamond);
   * Lattice ECP5 (toolchains: **Yosys+nextpnr**, Diamond);