From: Jan Hubicka Date: Thu, 16 Mar 2000 16:08:35 +0000 (+0100) Subject: i386.md (all HI and QI mode non-move patterns): Conditionize by TARGET_[HQ]IMODE_MATH. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d9f324226541553d4ac2852d1e467f9238304eba;p=gcc.git i386.md (all HI and QI mode non-move patterns): Conditionize by TARGET_[HQ]IMODE_MATH. * i386.md (all HI and QI mode non-move patterns): Conditionize by TARGET_[HQ]IMODE_MATH. * i386.h (x86_himode_math, x86_qimode_math, x86_promote_hi_regs, x86_promote_qi_regs): Declare. (TARGET_HIMODE_MATH, TARGET_QIMODE_MATH, TARGET_PROMOTE_HI_REGS, TARGET_PROMOTE_QI_REGS): New macros. (PROMOTE_MODE): New macro. * i386.c (x86_himode_math, x86_qimode_math, x86_promote_hi_regs, x86_promote_qi_regs): New global variables. From-SVN: r32588 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d781ebc663b..37dc67e4c4d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +Thu Mar 16 17:03:10 MET 2000 Jan Hubicka + + * i386.md (all HI and QI mode non-move patterns): Conditionize + by TARGET_[HQ]IMODE_MATH. + * i386.h (x86_himode_math, x86_qimode_math, x86_promote_hi_regs, + x86_promote_qi_regs): Declare. + (TARGET_HIMODE_MATH, TARGET_QIMODE_MATH, TARGET_PROMOTE_HI_REGS, + TARGET_PROMOTE_QI_REGS): New macros. + (PROMOTE_MODE): New macro. + * i386.c (x86_himode_math, x86_qimode_math, x86_promote_hi_regs, + x86_promote_qi_regs): New global variables. + Thu Mar 16 16:50:44 MET 2000 Jan Hubicka * calls.c (emit_library_call_value_1): Break out from ...; handle diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index c2eadf13bd2..e78809fbdf2 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -214,6 +214,10 @@ const int x86_read_modify = ~(m_PENT | m_PPRO); const int x86_split_long_moves = m_PPRO; const int x86_promote_QImode = m_K6 | m_PENT | m_386 | m_486; const int x86_single_stringop = m_386; +const int x86_qimode_math = ~(0); +const int x86_promote_qi_regs = 0; +const int x86_himode_math = ~(m_PPRO); +const int x86_promote_hi_regs = m_PPRO; #define AT_BP(mode) (gen_rtx_MEM ((mode), hard_frame_pointer_rtx)) diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index e6c13abf6d0..afaa80d36b6 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -163,6 +163,8 @@ extern const int x86_use_loop, x86_use_fiop, x86_use_mov0; extern const int x86_use_cltd, x86_read_modify_write; extern const int x86_read_modify, x86_split_long_moves; extern const int x86_promote_QImode, x86_single_stringop; +extern const int x86_himode_math, x86_qimode_math, x86_promote_qi_regs; +extern const int x86_promote_hi_regs; #define TARGET_USE_LEAVE (x86_use_leave & CPUMASK) #define TARGET_PUSH_MEMORY (x86_push_memory & CPUMASK) @@ -186,6 +188,10 @@ extern const int x86_promote_QImode, x86_single_stringop; #define TARGET_READ_MODIFY (x86_read_modify & CPUMASK) #define TARGET_PROMOTE_QImode (x86_promote_QImode & CPUMASK) #define TARGET_SINGLE_STRINGOP (x86_single_stringop & CPUMASK) +#define TARGET_QIMODE_MATH (x86_qimode_math & CPUMASK) +#define TARGET_HIMODE_MATH (x86_himode_math & CPUMASK) +#define TARGET_PROMOTE_QI_REGS (x86_promote_qi_regs & CPUMASK) +#define TARGET_PROMOTE_HI_REGS (x86_promote_hi_regs & CPUMASK) #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE) @@ -1740,6 +1746,19 @@ while (0) #define PROMOTE_PROTOTYPES 1 +/* A macro to update M and UNSIGNEDP when an object whose type is + TYPE and which has the specified mode and signedness is to be + stored in a register. This macro is only called when TYPE is a + scalar type. + + On i386 it is sometimes usefull to promote HImode and QImode + quantities to SImode. The choice depends on target type. */ + +#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ + if (((MODE) == HImode && TARGET_PROMOTE_HI_REGS) \ + || ((MODE) == QImode && TARGET_PROMOTE_QI_REGS)) \ + (MODE) = SImode; + /* Specify the machine mode that pointers have. After generation of rtl, the compiler makes no further distinction between pointers and any other objects of this machine mode. */ diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 925473952ac..7bac8ac0f36 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -900,7 +900,7 @@ [(set (reg:CC 17) (compare:CC (match_operand:QI 0 "general_operand" "") (match_operand:QI 1 "general_operand" "")))] - "" + "TARGET_QIMODE_MATH" " { if ((GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) @@ -1400,7 +1400,7 @@ [(set (attr "type") (cond [(and (eq_attr "alternative" "0") (eq (symbol_ref "TARGET_PARTIAL_REG_STALL") - (const_int 0))) + (const_int 0))) (const_string "imov") (and (eq_attr "alternative" "1,2") (match_operand:HI 1 "aligned_operand" "")) @@ -3412,7 +3412,7 @@ (plus:HI (match_operand:HI 1 "nonimmediate_operand" "") (match_operand:HI 2 "general_operand" ""))) (clobber (reg:CC 17))])] - "" + "TARGET_HIMODE_MATH" "ix86_expand_binary_operator (PLUS, HImode, operands); DONE;") ;; %%% After Dave's SUBREG_BYTE stuff goes in, re-enable incb %ah @@ -3514,7 +3514,7 @@ (plus:QI (match_operand:QI 1 "nonimmediate_operand" "") (match_operand:QI 2 "general_operand" ""))) (clobber (reg:CC 17))])] - "" + "TARGET_QIMODE_MATH" "ix86_expand_binary_operator (PLUS, QImode, operands); DONE;") ;; %%% Potential partial reg stall on alternative 2. What to do? @@ -3812,7 +3812,7 @@ (minus:HI (match_operand:HI 1 "nonimmediate_operand" "") (match_operand:HI 2 "general_operand" ""))) (clobber (reg:CC 17))])] - "" + "TARGET_HIMODE_MATH" "ix86_expand_binary_operator (MINUS, HImode, operands); DONE;") (define_insn "*subhi_1" @@ -3853,7 +3853,7 @@ (minus:QI (match_operand:QI 1 "nonimmediate_operand" "") (match_operand:QI 2 "general_operand" ""))) (clobber (reg:CC 17))])] - "" + "TARGET_QIMODE_MATH" "ix86_expand_binary_operator (MINUS, QImode, operands); DONE;") (define_insn "*subqi_1" @@ -3952,7 +3952,7 @@ (mult:HI (match_operand:HI 1 "register_operand" "") (match_operand:HI 2 "general_operand" ""))) (clobber (reg:CC 17))])] - "" + "TARGET_HIMODE_MATH" "") (define_insn "*mulhi3_1" @@ -3973,7 +3973,7 @@ (mult:QI (match_operand:QI 1 "register_operand" "%0") (match_operand:QI 2 "nonimmediate_operand" "qm"))) (clobber (reg:CC 17))] - "" + "TARGET_QIMODE_MATH" "mul{b}\\t%2" [(set_attr "type" "imul")]) @@ -3982,7 +3982,7 @@ (mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "%0")) (zero_extend:HI (match_operand:QI 2 "nonimmediate_operand" "qm")))) (clobber (reg:CC 17))] - "" + "TARGET_QIMODE_MATH" "mul{b}\\t%2" [(set_attr "type" "imul")]) @@ -3991,7 +3991,7 @@ (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "%0")) (sign_extend:HI (match_operand:QI 2 "nonimmediate_operand" "qm")))) (clobber (reg:CC 17))] - "" + "TARGET_QIMODE_MATH" "imul{b}\\t%2" [(set_attr "type" "imul")]) @@ -4076,7 +4076,7 @@ (div:QI (match_operand:HI 1 "register_operand" "0") (match_operand:QI 2 "nonimmediate_operand" "qm"))) (clobber (reg:CC 17))] - "" + "TARGET_QIMODE_MATH" "idiv{b}\\t%2" [(set_attr "type" "idiv") (set_attr "ppro_uops" "few")]) @@ -4086,7 +4086,7 @@ (udiv:QI (match_operand:HI 1 "register_operand" "0") (match_operand:QI 2 "nonimmediate_operand" "qm"))) (clobber (reg:CC 17))] - "" + "TARGET_QIMODE_MATH" "div{b}\\t%2" [(set_attr "type" "idiv") (set_attr "ppro_uops" "few")]) @@ -4206,7 +4206,7 @@ (set (match_operand:HI 3 "register_operand" "=&d") (mod:HI (match_dup 1) (match_dup 2))) (clobber (reg:CC 17))] - "" + "TARGET_HIMODE_MATH" "cwtd\;idiv{w}\\t%2" [(set_attr "type" "multi")]) @@ -4260,7 +4260,7 @@ (umod:HI (match_dup 1) (match_dup 2))) (use (match_dup 4)) (clobber (reg:CC 17))])] - "" + "TARGET_HIMODE_MATH" "operands[4] = gen_reg_rtx (HImode);") (define_insn "*udivmodhi_noext" @@ -4521,7 +4521,7 @@ (and:HI (match_operand:HI 1 "nonimmediate_operand" "") (match_operand:HI 2 "general_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_HIMODE_MATH" "ix86_expand_binary_operator (AND, HImode, operands); DONE;") (define_insn "*andhi_1" @@ -4581,7 +4581,7 @@ (and:QI (match_operand:QI 1 "nonimmediate_operand" "") (match_operand:QI 2 "general_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_QIMODE_MATH" "ix86_expand_binary_operator (AND, QImode, operands); DONE;") ;; %%% Potential partial reg stall on alternative 2. What to do? @@ -4729,7 +4729,7 @@ (ior:HI (match_operand:HI 1 "nonimmediate_operand" "") (match_operand:HI 2 "general_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_HIMODE_MATH" "ix86_expand_binary_operator (IOR, HImode, operands); DONE;") (define_insn "*iorhi_1" @@ -4757,7 +4757,7 @@ (ior:QI (match_operand:QI 1 "nonimmediate_operand" "") (match_operand:QI 2 "general_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_QIMODE_MATH" "ix86_expand_binary_operator (IOR, QImode, operands); DONE;") ;; %%% Potential partial reg stall on alternative 2. What to do? @@ -4822,7 +4822,7 @@ (xor:HI (match_operand:HI 1 "nonimmediate_operand" "") (match_operand:HI 2 "general_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_HIMODE_MATH" "ix86_expand_binary_operator (XOR, HImode, operands); DONE;") (define_insn "*xorhi_1" @@ -4850,7 +4850,7 @@ (xor:QI (match_operand:QI 1 "nonimmediate_operand" "") (match_operand:QI 2 "general_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_QIMODE_MATH" "ix86_expand_binary_operator (XOR, QImode, operands); DONE;") ;; %%% Potential partial reg stall on alternative 2. What to do? @@ -4977,7 +4977,7 @@ [(parallel [(set (match_operand:HI 0 "nonimmediate_operand" "") (neg:HI (match_operand:HI 1 "nonimmediate_operand" ""))) (clobber (reg:CC 17))])] - "" + "TARGET_HIMODE_MATH" "ix86_expand_unary_operator (NEG, HImode, operands); DONE;") (define_insn "*neghi2_1" @@ -5012,7 +5012,7 @@ [(parallel [(set (match_operand:QI 0 "nonimmediate_operand" "") (neg:QI (match_operand:QI 1 "nonimmediate_operand" ""))) (clobber (reg:CC 17))])] - "" + "TARGET_QIMODE_MATH" "ix86_expand_unary_operator (NEG, QImode, operands); DONE;") (define_insn "*negqi2_1" @@ -5442,7 +5442,7 @@ (define_expand "one_cmplhi2" [(set (match_operand:HI 0 "nonimmediate_operand" "") (not:HI (match_operand:HI 1 "nonimmediate_operand" "")))] - "" + "TARGET_HIMODE_MATH" "ix86_expand_unary_operator (NOT, HImode, operands); DONE;") (define_insn "*one_cmplhi2_1" @@ -5480,7 +5480,7 @@ (define_expand "one_cmplqi2" [(set (match_operand:QI 0 "nonimmediate_operand" "") (not:QI (match_operand:QI 1 "nonimmediate_operand" "")))] - "" + "TARGET_QIMODE_MATH" "ix86_expand_unary_operator (NOT, QImode, operands); DONE;") (define_insn "*one_cmplqi2_1" @@ -5761,7 +5761,7 @@ (ashift:HI (match_operand:HI 1 "nonimmediate_operand" "") (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_HIMODE_MATH" "ix86_expand_binary_operator (ASHIFT, HImode, operands); DONE;") (define_insn "*ashlhi3_1" @@ -5837,7 +5837,7 @@ (ashift:QI (match_operand:QI 1 "nonimmediate_operand" "") (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_QIMODE_MATH" "ix86_expand_binary_operator (ASHIFT, QImode, operands); DONE;") ;; %%% Potential partial reg stall on alternative 2. What to do? @@ -6075,7 +6075,7 @@ (lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "") (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_HIMODE_MATH" "ix86_expand_binary_operator (ASHIFTRT, HImode, operands); DONE;") (define_insn "*ashrhi3_1" @@ -6110,7 +6110,7 @@ (lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "") (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_QIMODE_MATH" "ix86_expand_binary_operator (ASHIFTRT, QImode, operands); DONE;") (define_insn "*ashrqi3_1" @@ -6237,7 +6237,7 @@ (lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "") (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_HIMODE_MATH" "ix86_expand_binary_operator (LSHIFTRT, HImode, operands); DONE;") (define_insn "*lshrhi3_1" @@ -6272,7 +6272,7 @@ (lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "") (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_QIMODE_MATH" "ix86_expand_binary_operator (LSHIFTRT, QImode, operands); DONE;") (define_insn "*lshrqi3_1" @@ -6328,7 +6328,7 @@ (rotate:HI (match_operand:HI 1 "nonimmediate_operand" "") (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_HIMODE_MATH" "ix86_expand_binary_operator (ROTATE, HImode, operands); DONE;") (define_insn "*rotlhi3_1" @@ -6347,7 +6347,7 @@ (rotate:QI (match_operand:QI 1 "nonimmediate_operand" "") (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_QIMODE_MATH" "ix86_expand_binary_operator (ROTATE, QImode, operands); DONE;") (define_insn "*rotlqi3_1" @@ -6385,7 +6385,7 @@ (rotatert:HI (match_operand:HI 1 "nonimmediate_operand" "") (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_HIMODE_MATH" "ix86_expand_binary_operator (ROTATERT, HImode, operands); DONE;") (define_insn "*rotrhi3" @@ -6404,7 +6404,7 @@ (rotatert:QI (match_operand:QI 1 "nonimmediate_operand" "") (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC 17))] - "" + "TARGET_QIMODE_MATH" "ix86_expand_binary_operator (ROTATERT, QImode, operands); DONE;") (define_insn "*rotrqi3_1" @@ -8605,6 +8605,7 @@ expanding unless TARGET_INLINE_ALL_STRINGOPS. */ if (TARGET_UNROLL_STRLEN && eoschar == const0_rtx && optimize > 1 + && !TARGET_INLINE_ALL_STRINGOPS && !optimize_size && (GET_CODE (align) != CONST_INT || INTVAL (align) < 4)) FAIL; @@ -8730,7 +8731,7 @@ (if_then_else:HI (match_operand 1 "comparison_operator" "") (match_operand:HI 2 "nonimmediate_operand" "") (match_operand:HI 3 "nonimmediate_operand" "")))] - "TARGET_CMOVE" + "TARGET_CMOVE && TARGET_HIMODE_MATH" "if (!ix86_expand_int_movcc (operands)) FAIL; DONE;") (define_insn "*movhicc_noc"