From: lkcl <lkcl@web>
Date: Sun, 22 May 2022 14:41:45 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2140
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=da20bbfe76599664e8db55ef28bf077a6f1955c2;p=libreriscv.git

---

diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn
index 6bd2a8a86..8dd3e46d6 100644
--- a/openpower/sv/int_fp_mv.mdwn
+++ b/openpower/sv/int_fp_mv.mdwn
@@ -227,13 +227,23 @@ allowing clearing FPRs.
 
 The above fits reasonably well with Minor 19 and follows the
 pattern shown by `addpcis`, which uses an entire column of Minor 19
-XO.  15 bits of FI fit into bits 11 to 25,
+XO. 15 bits of FI fit into bits 11 to 25,
 the top bit FI0 (MSB0 numbered 0) makes 16.
 
     bf16 = FI0 || FI
     fp32 = bf16 || [0]*16
     FRT = Single_to_Double(fp32)
 
+Also worth noting, `fmvis` fits well with DX-Form:
+
+|  0-5   | 6-10 | 11-15 | 16-25 | 26-30 | 31  |
+|--------|------|-------|-------|-------|-----|
+|  Major | FRT  | d0    | d1    | XO    | d2  |
+
+    bf16 = d2 || d1 || d0
+    fp32 = bf16 || [0]*16
+    FRT = Single_to_Double(fp32)
+
 ## FPR to GPR conversions
 
 <div id="fpr-to-gpr-conversion-mode"></div>