From: Gabe Black Date: Mon, 16 Jan 2012 12:27:10 +0000 (-0800) Subject: Merge yet again with the main repository. X-Git-Tag: stable_2012_06_28~275 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=da2a4acc26ba264c3c4a12495776fd6a1c4fb133;p=gem5.git Merge yet again with the main repository. --- da2a4acc26ba264c3c4a12495776fd6a1c4fb133 diff --cc src/arch/arm/isa/insts/m5ops.isa index a157b414c,f20908d4f..da2e10886 --- a/src/arch/arm/isa/insts/m5ops.isa +++ b/src/arch/arm/isa/insts/m5ops.isa @@@ -190,7 -190,13 +190,9 @@@ let { exec_output += PredOpExecute.subst(loadsymbolIop) initparamCode = ''' - Rt = PseudoInst::initParam(xc->tcBase()); -#if FULL_SYSTEM + uint64_t ip_val = PseudoInst::initParam(xc->tcBase()); + R0 = bits(ip_val, 31, 0); + R1 = bits(ip_val, 63, 32); -#else - PseudoInst::panicFsOnlyPseudoInst("initparam"); -#endif ''' initparamIop = InstObjParams("initparam", "Initparam", "PredOp", diff --cc src/arch/mips/faults.hh index bce828ec1,76d4fff23..b90c38e99 --- a/src/arch/mips/faults.hh +++ b/src/arch/mips/faults.hh @@@ -164,10 -165,10 +166,10 @@@ class CoprocessorUnusableFault : publi StaticInstPtr inst = StaticInst::nullStaticInstPtr) { MipsFault::invoke(tc, inst); - if (FULL_SYSTEM) { + if (FullSystem) { CauseReg cause = tc->readMiscReg(MISCREG_CAUSE); cause.ce = coProcID; - tc->setMiscReg(MISCREG_CAUSE, cause); + tc->setMiscRegNoEffect(MISCREG_CAUSE, cause); } } }; @@@ -250,10 -252,11 +253,11 @@@ class TlbFault : public AddressFaultpcState(this->vect(tc)); + DPRINTF(MipsPRA, "Fault %s encountered.\n", this->name()); + Addr vect = this->vect(tc); setTlbExceptionState(tc, this->code()); + tc->pcState(vect); } else { AddressFault::invoke(tc, inst); } diff --cc src/arch/mips/tlb.cc index 057fb5e76,b3ed09621..d28ef8231 --- a/src/arch/mips/tlb.cc +++ b/src/arch/mips/tlb.cc @@@ -309,29 -378,99 +311,17 @@@ TLB::translateInst(RequestPtr req, Thre Fault TLB::translateData(RequestPtr req, ThreadContext *tc, bool write) { -#if !FULL_SYSTEM - //@TODO: This should actually use TLB instead of going directly - // to the page table in syscall mode. - /** - * Check for alignment faults - */ - if (req->getVaddr() & (req->getSize() - 1)) { - DPRINTF(TLB, "Alignment Fault on %#x, size = %d", req->getVaddr(), - req->getSize()); - return new AddressErrorFault(req->getVaddr(), write); - } - + if (!FullSystem) { - //@TODO: This should actually use TLB instead of going directly - // to the page table in syscall mode. - /** - * Check for alignment faults - */ - if (req->getVaddr() & (req->getSize() - 1)) { - DPRINTF(TLB, "Alignment Fault on %#x, size = %d", req->getVaddr(), - req->getSize()); - return new AddressErrorFault(req->getVaddr(), write); - } - - + Process * p = tc->getProcessPtr(); - Process * p = tc->getProcessPtr(); + Fault fault = p->pTable->translate(req); + if (fault != NoFault) + return fault; - Fault fault = p->pTable->translate(req); - if (fault != NoFault) - return fault; - - return NoFault; -#else - Addr vaddr = req->getVaddr(); - - bool misaligned = (req->getSize() - 1) & vaddr; - - if (IsKSeg0(vaddr)) { - // Address will not be translated through TLB, set response, and go! - req->setPaddr(KSeg02Phys(vaddr)); - if (getOperatingMode(tc->readMiscReg(MISCREG_STATUS)) != mode_kernel || - misaligned) { - return new AddressErrorFault(vaddr, true); - } - } else if(IsKSeg1(vaddr)) { - // Address will not be translated through TLB, set response, and go! - req->setPaddr(KSeg02Phys(vaddr)); + return NoFault; } else { - /* - * This is an optimization - smallPages is updated every time a TLB - * operation is performed. That way, we don't need to look at - * Config3 _ SP and PageGrain _ ESP every time we do a TLB lookup - */ - Addr VPN = (vaddr >> 11) & 0xFFFFFFFC; - if (smallPages == 1) { - VPN = vaddr >> 11; - } - uint8_t Asid = req->getAsid(); - PTE *pte = lookup(VPN, Asid); - if (misaligned) { - return new AddressErrorFault(vaddr, true); - } - if (pte != NULL) { - // Ok, found something - /* Check for valid bits */ - int EvenOdd; - bool Valid; - bool Dirty; - if ((((vaddr >> pte->AddrShiftAmount) & 1)) == 0) { - // Check even bits - Valid = pte->V0; - Dirty = pte->D0; - EvenOdd = 0; - } else { - // Check odd bits - Valid = pte->V1; - Dirty = pte->D1; - EvenOdd = 1; - } - - if (Valid == false) { - return new TlbInvalidFault(Asid, vaddr, VPN, write); - } else { - // Ok, this is really a match, set paddr - if (!Dirty && write) { - return new TlbModifiedFault(Asid, vaddr, VPN); - } - Addr PAddr; - if (EvenOdd == 0) { - PAddr = pte->PFN0; - } else { - PAddr = pte->PFN1; - } - PAddr >>= (pte->AddrShiftAmount - 12); - PAddr <<= pte->AddrShiftAmount; - PAddr |= (vaddr & pte->OffsetMask); - req->setPaddr(PAddr); - } - } else { - // Didn't find any match, return a TLB Refill Exception - return new TlbRefillFault(Asid, vaddr, VPN, write); - } + panic("translateData not implemented in MIPS.\n"); } - return checkCacheability(req); -#endif } Fault diff --cc src/sim/system.cc index 3051cb64b,556a919d5..d3bee1ad1 --- a/src/sim/system.cc +++ b/src/sim/system.cc @@@ -43,16 -54,22 +55,17 @@@ #include "config/the_isa.hh" #include "cpu/thread_context.hh" #include "debug/Loader.hh" + #include "debug/WorkItems.hh" +#include "kern/kernel_stats.hh" #include "mem/mem_object.hh" #include "mem/physical.hh" +#include "mem/vport.hh" +#include "params/System.hh" #include "sim/byteswap.hh" #include "sim/debug.hh" +#include "sim/full_system.hh" #include "sim/system.hh" -#if FULL_SYSTEM -#include "arch/vtophys.hh" -#include "kern/kernel_stats.hh" -#include "mem/vport.hh" -#else -#include "params/System.hh" -#endif - using namespace std; using namespace TheISA; @@@ -156,8 -178,16 +170,11 @@@ System::System(Params *p System::~System() { -#if FULL_SYSTEM delete kernelSymtab; delete kernel; -#else - panic("System::fixFuncEventAddr needs to be rewritten " - "to work with syscall emulation"); -#endif // FULL_SYSTEM} + + for (uint32_t j = 0; j < numWorkIds; j++) + delete workItemStats[j]; } void @@@ -313,12 -348,45 +330,43 @@@ System::serialize(ostream &os void System::unserialize(Checkpoint *cp, const string §ion) { -#if FULL_SYSTEM - kernelSymtab->unserialize("kernel_symtab", cp, section); -#else // !FULL_SYSTEM + if (FullSystem) + kernelSymtab->unserialize("kernel_symtab", cp, section); UNSERIALIZE_SCALAR(pagePtr); UNSERIALIZE_SCALAR(nextPID); -#endif } + void + System::regStats() + { + for (uint32_t j = 0; j < numWorkIds ; j++) { + workItemStats[j] = new Stats::Histogram(); + stringstream namestr; + ccprintf(namestr, "work_item_type%d", j); + workItemStats[j]->init(20) + .name(name() + "." + namestr.str()) + .desc("Run time stat for" + namestr.str()) + .prereq(*workItemStats[j]); + } + } + + void + System::workItemEnd(uint32_t tid, uint32_t workid) + { + std::pair p(tid, workid); + if (!lastWorkItemStarted.count(p)) + return; + + Tick samp = curTick() - lastWorkItemStarted[p]; + DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp); + + if (workid >= numWorkIds) + fatal("Got workid greater than specified in system configuration\n"); + + workItemStats[workid]->sample(samp); + lastWorkItemStarted.erase(p); + } + void System::printSystems() { diff --cc src/sim/system.hh index 00d8360e0,44383c399..d675eb727 --- a/src/sim/system.hh +++ b/src/sim/system.hh @@@ -198,6 -214,15 +200,14 @@@ class System : public SimObjec return count; } + inline void workItemBegin(uint32_t tid, uint32_t workid) + { + std::pair p(tid, workid); + lastWorkItemStarted[p] = curTick(); + } + + void workItemEnd(uint32_t tid, uint32_t workid); + -#if FULL_SYSTEM /** * Fix up an address used to match PCs for hooking simulator * events on to target function executions. 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