From: Konrad Beckmann <konrad.beckmann@gmail.com>
Date: Mon, 6 Aug 2018 04:30:33 +0000 (+0900)
Subject: readme: Fix formatting of a keyword
X-Git-Tag: yosys-0.8~44^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=da53206cd4b1e32d8bf29bb33cdfec81d614525e;p=yosys.git

readme: Fix formatting of a keyword

Single quotes were used instead of backticks leading to
incorrect formatting.
---

diff --git a/README.md b/README.md
index c02691d94..424d9bbf2 100644
--- a/README.md
+++ b/README.md
@@ -389,7 +389,7 @@ Verilog Attributes and non-standard features
 Non-standard or SystemVerilog features for formal verification
 ==============================================================
 
-- Support for ``assert``, ``assume``, ``restrict``, and ``cover'' is enabled
+- Support for ``assert``, ``assume``, ``restrict``, and ``cover`` is enabled
   when ``read_verilog`` is called with ``-formal``.
 
 - The system task ``$initstate`` evaluates to 1 in the initial state and