From: Luke Kenneth Casson Leighton Date: Thu, 2 May 2019 12:55:36 +0000 (+0100) Subject: reorganise imports X-Git-Tag: ls180-24jan2020~1084 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=da918b3777224f5fe562d23eebc3b110261a8c8f;p=ieee754fpu.git reorganise imports --- diff --git a/src/ieee754/add/concurrentunit.py b/src/ieee754/add/concurrentunit.py index c0053c8b..dbe4a964 100644 --- a/src/ieee754/add/concurrentunit.py +++ b/src/ieee754/add/concurrentunit.py @@ -10,12 +10,12 @@ from singlepipe import PassThroughStage from multipipe import CombMuxOutPipe from multipipe import PriorityCombMuxInPipe -from fpcommon.getop import FPADDBaseData -from fpcommon.denorm import FPSCData -from fpcommon.pack import FPPackData -from fpcommon.normtopack import FPNormToPack -from fpadd.specialcases import FPAddSpecialCasesDeNorm -from fpadd.addstages import FPAddAlignSingleAdd +from ieee754.fpcommon.getop import FPADDBaseData +from ieee754.fpcommon.denorm import FPSCData +from ieee754.fpcommon.pack import FPPackData +from ieee754.fpcommon.normtopack import FPNormToPack +from ieee754.fpadd.specialcases import FPAddSpecialCasesDeNorm +from ieee754.fpadd.addstages import FPAddAlignSingleAdd def num_bits(n): diff --git a/src/ieee754/add/nmigen_add_experiment.py b/src/ieee754/add/nmigen_add_experiment.py index ecb1d35b..773e3aee 100644 --- a/src/ieee754/add/nmigen_add_experiment.py +++ b/src/ieee754/add/nmigen_add_experiment.py @@ -3,8 +3,8 @@ # 2013-12-12 from nmigen.cli import main, verilog -from fpadd.statemachine import FPADDBase, FPADD -from fpadd.pipeline import FPADDMuxInOut +from ieee754.fpadd.statemachine import FPADDBase, FPADD +from ieee754.fpadd.pipeline import FPADDMuxInOut if __name__ == "__main__": if True: diff --git a/src/ieee754/fpadd/add0.py b/src/ieee754/fpadd/add0.py index 76790fe2..f380d3e5 100644 --- a/src/ieee754/fpadd/add0.py +++ b/src/ieee754/fpadd/add0.py @@ -7,7 +7,7 @@ from nmigen.cli import main, verilog from fpbase import FPNumBase from fpbase import FPState -from fpcommon.denorm import FPSCData +from ieee754.fpcommon.denorm import FPSCData class FPAddStage0Data: diff --git a/src/ieee754/fpadd/add1.py b/src/ieee754/fpadd/add1.py index 679f5176..1c0ff27a 100644 --- a/src/ieee754/fpadd/add1.py +++ b/src/ieee754/fpadd/add1.py @@ -7,8 +7,8 @@ from nmigen.cli import main, verilog from math import log from fpbase import FPState -from fpcommon.postcalc import FPAddStage1Data -from fpadd.add0 import FPAddStage0Data +from ieee754.fpcommon.postcalc import FPAddStage1Data +from .add0 import FPAddStage0Data class FPAddStage1Mod(FPState, Elaboratable): diff --git a/src/ieee754/fpadd/addstages.py b/src/ieee754/fpadd/addstages.py index f5703aec..62452c37 100644 --- a/src/ieee754/fpadd/addstages.py +++ b/src/ieee754/fpadd/addstages.py @@ -9,11 +9,11 @@ from singlepipe import (StageChain, SimpleHandshake, PassThroughStage) from fpbase import FPState -from fpcommon.denorm import FPSCData -from fpcommon.postcalc import FPAddStage1Data -from fpadd.align import FPAddAlignSingleMod -from fpadd.add0 import FPAddStage0Mod -from fpadd.add1 import FPAddStage1Mod +from ieee754.fpcommon.denorm import FPSCData +from ieee754.fpcommon.postcalc import FPAddStage1Data +from .align import FPAddAlignSingleMod +from .add0 import FPAddStage0Mod +from .add1 import FPAddStage1Mod class FPAddAlignSingleAdd(FPState, SimpleHandshake): diff --git a/src/ieee754/fpadd/align.py b/src/ieee754/fpadd/align.py index 9837a0b8..c4b4d52f 100644 --- a/src/ieee754/fpadd/align.py +++ b/src/ieee754/fpadd/align.py @@ -8,7 +8,7 @@ from nmigen.cli import main, verilog from fpbase import FPNumOut, FPNumIn, FPNumBase from fpbase import MultiShiftRMerge from fpbase import FPState -from fpcommon.denorm import FPSCData +from ieee754.fpcommon.denorm import FPSCData class FPNumIn2Ops: diff --git a/src/ieee754/fpadd/pipeline.py b/src/ieee754/fpadd/pipeline.py index e244ee60..5c4eed18 100644 --- a/src/ieee754/fpadd/pipeline.py +++ b/src/ieee754/fpadd/pipeline.py @@ -9,12 +9,12 @@ from singlepipe import (ControlBase, SimpleHandshake, PassThroughStage) from multipipe import CombMuxOutPipe from multipipe import PriorityCombMuxInPipe -from fpcommon.getop import FPADDBaseData -from fpcommon.denorm import FPSCData -from fpcommon.pack import FPPackData -from fpcommon.normtopack import FPNormToPack -from fpadd.specialcases import FPAddSpecialCasesDeNorm -from fpadd.addstages import FPAddAlignSingleAdd +from ieee754.fpcommon.getop import FPADDBaseData +from ieee754.fpcommon.denorm import FPSCData +from ieee754.fpcommon.pack import FPPackData +from ieee754.fpcommon.normtopack import FPNormToPack +from .specialcases import FPAddSpecialCasesDeNorm +from .addstages import FPAddAlignSingleAdd from concurrentunit import ReservationStations, num_bits diff --git a/src/ieee754/fpadd/specialcases.py b/src/ieee754/fpadd/specialcases.py index 6f9d1a08..39254a74 100644 --- a/src/ieee754/fpadd/specialcases.py +++ b/src/ieee754/fpadd/specialcases.py @@ -10,8 +10,8 @@ from fpbase import FPNumDecode from singlepipe import SimpleHandshake, StageChain from fpbase import FPState, FPID -from fpcommon.getop import FPADDBaseData -from fpcommon.denorm import (FPSCData, FPAddDeNormMod) +from ieee754.fpcommon.getop import FPADDBaseData +from ieee754.fpcommon.denorm import (FPSCData, FPAddDeNormMod) class FPAddSpecialCasesMod: diff --git a/src/ieee754/fpadd/statemachine.py b/src/ieee754/fpadd/statemachine.py index 4418b3fa..e7f298d3 100644 --- a/src/ieee754/fpadd/statemachine.py +++ b/src/ieee754/fpadd/statemachine.py @@ -11,22 +11,22 @@ from fpbase import Trigger from singlepipe import (StageChain, SimpleHandshake) from fpbase import FPState, FPID -from fpcommon.getop import (FPGetOp, FPADDBaseData, FPGet2Op) -from fpcommon.denorm import (FPSCData, FPAddDeNorm) -from fpcommon.postcalc import FPAddStage1Data -from fpcommon.postnormalise import (FPNorm1Data, +from ieee754.fpcommon.getop import (FPGetOp, FPADDBaseData, FPGet2Op) +from ieee754.fpcommon.denorm import (FPSCData, FPAddDeNorm) +from ieee754.fpcommon.postcalc import FPAddStage1Data +from ieee754.fpcommon.postnormalise import (FPNorm1Data, FPNorm1Single, FPNorm1Multi) -from fpcommon.roundz import (FPRoundData, FPRound) -from fpcommon.corrections import FPCorrections -from fpcommon.pack import (FPPackData, FPPackMod, FPPack) -from fpcommon.normtopack import FPNormToPack -from fpcommon.putz import (FPPutZ, FPPutZIdx) - -from fpadd.specialcases import (FPAddSpecialCases, FPAddSpecialCasesDeNorm) -from fpadd.align import (FPAddAlignMulti, FPAddAlignSingle) -from fpadd.add0 import (FPAddStage0Data, FPAddStage0) -from fpadd.add1 import (FPAddStage1Mod, FPAddStage1) -from fpadd.addstages import FPAddAlignSingleAdd +from ieee754.fpcommon.roundz import (FPRoundData, FPRound) +from ieee754.fpcommon.corrections import FPCorrections +from ieee754.fpcommon.pack import (FPPackData, FPPackMod, FPPack) +from ieee754.fpcommon.normtopack import FPNormToPack +from ieee754.fpcommon.putz import (FPPutZ, FPPutZIdx) + +from .specialcases import (FPAddSpecialCases, FPAddSpecialCasesDeNorm) +from .align import (FPAddAlignMulti, FPAddAlignSingle) +from .add0 import (FPAddStage0Data, FPAddStage0) +from .add1 import (FPAddStage1Mod, FPAddStage1) +from .addstages import FPAddAlignSingleAdd class FPOpData: diff --git a/src/ieee754/fpcommon/corrections.py b/src/ieee754/fpcommon/corrections.py index ce9ba3cd..68340275 100644 --- a/src/ieee754/fpcommon/corrections.py +++ b/src/ieee754/fpcommon/corrections.py @@ -5,7 +5,7 @@ from nmigen import Module, Elaboratable from nmigen.cli import main, verilog from fpbase import FPState -from fpcommon.roundz import FPRoundData +from .roundz import FPRoundData class FPCorrectionsMod(Elaboratable): diff --git a/src/ieee754/fpcommon/normtopack.py b/src/ieee754/fpcommon/normtopack.py index 87d08125..7d871f42 100644 --- a/src/ieee754/fpcommon/normtopack.py +++ b/src/ieee754/fpcommon/normtopack.py @@ -7,11 +7,11 @@ from singlepipe import StageChain, SimpleHandshake from fpbase import FPState, FPID -from fpcommon.postcalc import FPAddStage1Data -from fpcommon.postnormalise import FPNorm1ModSingle -from fpcommon.roundz import FPRoundMod -from fpcommon.corrections import FPCorrectionsMod -from fpcommon.pack import FPPackData, FPPackMod +from .postcalc import FPAddStage1Data +from .postnormalise import FPNorm1ModSingle +from .roundz import FPRoundMod +from .corrections import FPCorrectionsMod +from .pack import FPPackData, FPPackMod class FPNormToPack(FPState, SimpleHandshake): diff --git a/src/ieee754/fpcommon/pack.py b/src/ieee754/fpcommon/pack.py index 1464883c..18d6921d 100644 --- a/src/ieee754/fpcommon/pack.py +++ b/src/ieee754/fpcommon/pack.py @@ -7,7 +7,7 @@ from nmigen.cli import main, verilog from fpbase import FPNumOut from fpbase import FPState -from fpcommon.roundz import FPRoundData +from .roundz import FPRoundData from singlepipe import Object diff --git a/src/ieee754/fpcommon/roundz.py b/src/ieee754/fpcommon/roundz.py index 420d6669..2b456fba 100644 --- a/src/ieee754/fpcommon/roundz.py +++ b/src/ieee754/fpcommon/roundz.py @@ -7,7 +7,7 @@ from nmigen.cli import main, verilog from fpbase import FPNumBase from fpbase import FPState -from fpcommon.postnormalise import FPNorm1Data +from .postnormalise import FPNorm1Data class FPRoundData: