From: lkcl Date: Fri, 21 Apr 2023 15:16:36 +0000 (+0100) Subject: (no commit message) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=da9f6f4d9de84064f61295ace25b20b235afc598;p=libreriscv.git --- diff --git a/openpower/sv/rfc/ls011.mdwn b/openpower/sv/rfc/ls011.mdwn index fb8ee348b..740abaab2 100644 --- a/openpower/sv/rfc/ls011.mdwn +++ b/openpower/sv/rfc/ls011.mdwn @@ -37,7 +37,7 @@ **Impact on processor**: ``` - TODO + Addition of new Load/Store Fixed and Floating Point instructions ``` **Impact on software**: @@ -55,19 +55,29 @@ **Motivation** - +Moving the update of RA to *after* the Memory operation saves on instruction count +both outside and inside hot-loops. strncpy may be reduced to 11 Vector instructions, +3 of which are the zeroing loop, 5 of which are the copy. Percentage-wise LD/ST +Update Post-Increment represents a massive 20% reduction. **Notes and Observations**: +These types of instructions are already present in x86 (sort-of). +* x86 chose that store should be pre-indexed and load should be post-indexed +* Power ISA chose everything to be pre-indexed +* Motorola 68000 (decades old) has pre- and post- indexed + + + + **Changes** Add the following entries to: -* A new "Vector Looping" Book -* New Vector-Looping Chapters -* New Vector-Looping Appendices +* New Load/Store Sections +* Appendices [[!tag opf_rfc]] @@ -79,19 +89,6 @@ TODO (key stub notes below) -The following instructions are proposed to be added in EXT2xx, -duplicating LD/ST-Update functionality but moving the update -of RA to *after* the Memory operation. These types of -instructions are already present in x86 (sort-of). - -* x86 chose that store should be pre-indexed and load should be post-indexed -* Power ISA chose everything to be pre-indexed -* Motorola 68000 (decades old) has pre- and post- indexed - - - - - The LD/ST-Immediate-Post-Increment instructions are all Primary Opcode: there are 13 of these. LD/ST-Indexed-Post-Increment are all effectively 9-bit XO and consequently may easily