From: lkcl Date: Fri, 2 Apr 2021 17:38:15 +0000 (+0100) Subject: (no commit message) X-Git-Tag: DRAFT_SVP64_0_1~1083 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=db02f1ca2bbc8bd661a490c0728533f310be3dbf;p=libreriscv.git --- diff --git a/resources.mdwn b/resources.mdwn index 477aece5e..7a476ba45 100644 --- a/resources.mdwn +++ b/resources.mdwn @@ -488,3 +488,29 @@ This list auto-generated from a page tag "standards": * * * + +# TODO investigate + +``` + https://github.com/idea-fasoc/OpenFASOC + https://www.quicklogic.com/2020/06/18/the-tipping-point/ + https://www.quicklogic.com/blog/ + https://www.quicklogic.com/2020/09/15/why-open-source-ecosystems-make-good-business-sense/ + https://www.quicklogic.com/qorc/ + https://en.wikipedia.org/wiki/RAD750 + The RAD750 system has a price that is comparable to the RAD6000, the latter of which as of 2002 was listed at US$200,000 (equivalent to $284,292 in 2019). + https://theamphour.com/525-open-fpga-toolchains-and-machine-learning-with-brian-faith-of-quicklogic/ + https://github.blog/2021-03-22-open-innovation-winning-strategy-digital-sovereignty-human-progress/ + https://github.com/olofk/edalize + https://github.com/hdl/containers + https://twitter.com/OlofKindgren/status/1374848733746192394 + You might also want to check out https://umarcor.github.io/osvb/index.html + https://www.linkedin.com/pulse/1932021-python-now-replaces-tcl-all-besteda-apis-avidan-efody/ + “TCL has served us well, over the years, allowing us to provide an API, and at the same time ensure nobody will ever use it. I will miss it”. + https://sphinxcontrib-hdl-diagrams.readthedocs.io/en/latest/examples/comb-full-adder.html + https://sphinxcontrib-hdl-diagrams.readthedocs.io/en/latest/examples/carry4.html + FuseSoC is used by MicroWatt and Western Digital cores + OpenTitan also uses FuseSoC + LowRISC is UK based + https://antmicro.com/blog/2020/12/ibex-support-in-verilator-yosys-via-uhdm-surelog/ +```