From: Kenneth Graunke <kenneth@whitecape.org>
Date: Tue, 30 Jan 2018 10:16:34 +0000 (-0800)
Subject: iris: actually pin the instruction cache buffers
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=db15993cfdd6e03435852d408e4fabaec642f297;p=mesa.git

iris: actually pin the instruction cache buffers
---

diff --git a/src/gallium/drivers/iris/iris_batch.c b/src/gallium/drivers/iris/iris_batch.c
index 5d3d6698a37..e254863aef9 100644
--- a/src/gallium/drivers/iris/iris_batch.c
+++ b/src/gallium/drivers/iris/iris_batch.c
@@ -659,6 +659,13 @@ emit_reloc(struct iris_batch *batch,
    return entry->offset + target_offset;
 }
 
+void
+iris_use_pinned_bo(struct iris_batch *batch, struct iris_bo *bo)
+{
+   assert(bo->kflags & EXEC_OBJECT_PINNED);
+   add_exec_bo(batch, bo);
+}
+
 uint64_t
 iris_batch_reloc(struct iris_batch *batch, uint32_t batch_offset,
                  struct iris_bo *target, uint32_t target_offset,
diff --git a/src/gallium/drivers/iris/iris_batch.h b/src/gallium/drivers/iris/iris_batch.h
index 6b67737f614..bb891c68263 100644
--- a/src/gallium/drivers/iris/iris_batch.h
+++ b/src/gallium/drivers/iris/iris_batch.h
@@ -121,6 +121,8 @@ bool iris_batch_references(struct iris_batch *batch, struct iris_bo *bo);
 
 #define RELOC_WRITE EXEC_OBJECT_WRITE
 
+void iris_use_pinned_bo(struct iris_batch *batch, struct iris_bo *bo);
+
 uint64_t iris_batch_reloc(struct iris_batch *batch,
                           uint32_t batch_offset,
                           struct iris_bo *target,
diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index b07664bc88d..be75de2402c 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -263,6 +263,8 @@ iris_resource_create_with_modifiers(struct pipe_screen *pscreen,
       goto fail;
 
    if (templ->flags & IRIS_RESOURCE_FLAG_INSTRUCTION_CACHE) {
+      res->bo->kflags = EXEC_OBJECT_PINNED;
+      res->bo->name = "instruction cache";
       // XXX: p_atomic_add is backwards :(
       res->bo->gtt_offset = __atomic_fetch_add(&screen->next_instruction_address, res->bo->size, __ATOMIC_ACQ_REL);
    }
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 5f9573dd8dd..48f62b13b0b 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -1989,8 +1989,12 @@ iris_upload_render_state(struct iris_context *ice,
       if (!(dirty & (IRIS_DIRTY_VS << stage)))
          continue;
 
-      if (ice->shaders.prog[stage]) {
-         iris_batch_emit(batch, ice->shaders.prog[stage]->derived_data,
+      struct iris_compiled_shader *shader = ice->shaders.prog[stage];
+
+      if (shader) {
+         struct iris_resource *cache = (void *) shader->buffer;
+         iris_use_pinned_bo(batch, cache->bo);
+         iris_batch_emit(batch, shader->derived_data,
                          iris_derived_program_state_size(stage));
       } else {
          if (stage == MESA_SHADER_TESS_EVAL) {