From: Gabe Black <gabeblack@google.com>
Date: Tue, 20 Nov 2018 03:03:24 +0000 (-0800)
Subject: hsail: Remove the MiscReg type.
X-Git-Tag: v19.0.0.0~1226
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=db190b8e68c1b3230ac45b75bf74da41a94c7ca2;p=gem5.git

hsail: Remove the MiscReg type.

It has been replaced by the ISA agnostic RegVal.

Change-Id: I563ea3852e37b5c1cf51eb0ac9a6f2a827ba89cf
Reviewed-on: https://gem5-review.googlesource.com/c/14464
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
---

diff --git a/src/arch/hsail/gpu_isa.hh b/src/arch/hsail/gpu_isa.hh
index fa2cde3b1..86af90599 100644
--- a/src/arch/hsail/gpu_isa.hh
+++ b/src/arch/hsail/gpu_isa.hh
@@ -45,8 +45,6 @@
 
 namespace HsailISA
 {
-    typedef uint64_t MiscReg;
-
     class GPUISA
     {
       public:
@@ -55,12 +53,12 @@ namespace HsailISA
         }
 
         void
-        writeMiscReg(int opIdx, MiscReg operandVal)
+        writeMiscReg(int opIdx, RegVal operandVal)
         {
             fatal("HSAIL does not implement misc registers yet\n");
         }
 
-        MiscReg
+        RegVal
         readMiscReg(int opIdx) const
         {
             fatal("HSAIL does not implement misc registers yet\n");