From: Lionel Landwerlin Date: Fri, 11 Oct 2019 12:54:57 +0000 (+0300) Subject: intel/perf: move registers to their own header X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=db7a6847dda52ceac9f8b371a3fad81a94086884;p=mesa.git intel/perf: move registers to their own header Will conflict with the genxml RPSTAT register. Signed-off-by: Lionel Landwerlin Reviewed-by: Rafael Antognolli --- diff --git a/src/gallium/drivers/iris/iris_monitor.c b/src/gallium/drivers/iris/iris_monitor.c index cef3f844487..780fce362de 100644 --- a/src/gallium/drivers/iris/iris_monitor.c +++ b/src/gallium/drivers/iris/iris_monitor.c @@ -28,6 +28,7 @@ #include "iris_context.h" #include "perf/gen_perf.h" +#include "perf/gen_perf_regs.h" struct iris_monitor_object { int num_active_counters; diff --git a/src/intel/perf/gen_perf.c b/src/intel/perf/gen_perf.c index 61bf8329d2c..2e71df83576 100644 --- a/src/intel/perf/gen_perf.c +++ b/src/intel/perf/gen_perf.c @@ -33,6 +33,7 @@ #include "common/gen_gem.h" #include "gen_perf.h" +#include "gen_perf_regs.h" #include "perf/gen_perf_mdapi.h" #include "perf/gen_perf_metrics.h" diff --git a/src/intel/perf/gen_perf.h b/src/intel/perf/gen_perf.h index 5385607b956..f43286f73a6 100644 --- a/src/intel/perf/gen_perf.h +++ b/src/intel/perf/gen_perf.h @@ -43,18 +43,6 @@ struct gen_device_info; struct gen_perf_config; struct gen_perf_query_info; -#define GEN7_RPSTAT1 0xA01C -#define GEN7_RPSTAT1_CURR_GT_FREQ_SHIFT 7 -#define GEN7_RPSTAT1_CURR_GT_FREQ_MASK INTEL_MASK(13, 7) -#define GEN7_RPSTAT1_PREV_GT_FREQ_SHIFT 0 -#define GEN7_RPSTAT1_PREV_GT_FREQ_MASK INTEL_MASK(6, 0) - -#define GEN9_RPSTAT0 0xA01C -#define GEN9_RPSTAT0_CURR_GT_FREQ_SHIFT 23 -#define GEN9_RPSTAT0_CURR_GT_FREQ_MASK INTEL_MASK(31, 23) -#define GEN9_RPSTAT0_PREV_GT_FREQ_SHIFT 0 -#define GEN9_RPSTAT0_PREV_GT_FREQ_MASK INTEL_MASK(8, 0) - enum gen_perf_counter_type { GEN_PERF_COUNTER_TYPE_EVENT, GEN_PERF_COUNTER_TYPE_DURATION_NORM, @@ -87,19 +75,6 @@ struct gen_pipeline_stat { */ #define MAX_OA_REPORT_COUNTERS 62 -#define IA_VERTICES_COUNT 0x2310 -#define IA_PRIMITIVES_COUNT 0x2318 -#define VS_INVOCATION_COUNT 0x2320 -#define HS_INVOCATION_COUNT 0x2300 -#define DS_INVOCATION_COUNT 0x2308 -#define GS_INVOCATION_COUNT 0x2328 -#define GS_PRIMITIVES_COUNT 0x2330 -#define CL_INVOCATION_COUNT 0x2338 -#define CL_PRIMITIVES_COUNT 0x2340 -#define PS_INVOCATION_COUNT 0x2348 -#define CS_INVOCATION_COUNT 0x2290 -#define PS_DEPTH_COUNT 0x2350 - /* * When currently allocate only one page for pipeline statistics queries. Here * we derived the maximum number of counters for that amount. diff --git a/src/intel/perf/gen_perf_regs.h b/src/intel/perf/gen_perf_regs.h new file mode 100644 index 00000000000..397c7dd0f96 --- /dev/null +++ b/src/intel/perf/gen_perf_regs.h @@ -0,0 +1,54 @@ +/* + * Copyright © 2019 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef GEN_PERF_REGS_H +#define GEN_PERF_REGS_H + +/* GT core frequency counters */ +#define GEN7_RPSTAT1 0xA01C +#define GEN7_RPSTAT1_CURR_GT_FREQ_SHIFT 7 +#define GEN7_RPSTAT1_CURR_GT_FREQ_MASK INTEL_MASK(13, 7) +#define GEN7_RPSTAT1_PREV_GT_FREQ_SHIFT 0 +#define GEN7_RPSTAT1_PREV_GT_FREQ_MASK INTEL_MASK(6, 0) + +#define GEN9_RPSTAT0 0xA01C +#define GEN9_RPSTAT0_CURR_GT_FREQ_SHIFT 23 +#define GEN9_RPSTAT0_CURR_GT_FREQ_MASK INTEL_MASK(31, 23) +#define GEN9_RPSTAT0_PREV_GT_FREQ_SHIFT 0 +#define GEN9_RPSTAT0_PREV_GT_FREQ_MASK INTEL_MASK(8, 0) + +/* Pipeline statistic counters */ +#define IA_VERTICES_COUNT 0x2310 +#define IA_PRIMITIVES_COUNT 0x2318 +#define VS_INVOCATION_COUNT 0x2320 +#define HS_INVOCATION_COUNT 0x2300 +#define DS_INVOCATION_COUNT 0x2308 +#define GS_INVOCATION_COUNT 0x2328 +#define GS_PRIMITIVES_COUNT 0x2330 +#define CL_INVOCATION_COUNT 0x2338 +#define CL_PRIMITIVES_COUNT 0x2340 +#define PS_INVOCATION_COUNT 0x2348 +#define CS_INVOCATION_COUNT 0x2290 +#define PS_DEPTH_COUNT 0x2350 + +#endif /* GEN_PERF_REGS_H */ diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965/brw_performance_query.c index 16e467442bc..0e5459e5e5e 100644 --- a/src/mesa/drivers/dri/i965/brw_performance_query.c +++ b/src/mesa/drivers/dri/i965/brw_performance_query.c @@ -73,6 +73,7 @@ #include "intel_batchbuffer.h" #include "perf/gen_perf.h" +#include "perf/gen_perf_regs.h" #include "perf/gen_perf_mdapi.h" #define FILE_DEBUG_FLAG DEBUG_PERFMON diff --git a/src/mesa/drivers/dri/i965/gen6_queryobj.c b/src/mesa/drivers/dri/i965/gen6_queryobj.c index a77ac823f7a..db6ae21da47 100644 --- a/src/mesa/drivers/dri/i965/gen6_queryobj.c +++ b/src/mesa/drivers/dri/i965/gen6_queryobj.c @@ -36,7 +36,7 @@ #include "brw_context.h" #include "brw_defines.h" #include "brw_state.h" -#include "perf/gen_perf.h" +#include "perf/gen_perf_regs.h" #include "intel_batchbuffer.h" #include "intel_buffer_objects.h"