From: Mikhail Maltsev <maltsevm@gmail.com>
Date: Tue, 24 Nov 2015 12:18:21 +0000 (+0000)
Subject: Fix PR68497 (ICE with -fno-checking)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=db92ed368534d79e1d210aebb1e1bd70713baf7b;p=gcc.git

Fix PR68497 (ICE with -fno-checking)

gcc/

	PR target/68497
	* config/i386/i386.c (output_387_binary_op): Fix assertion for
	-fno-checking case.

gcc/testsuite/

	PR target/68497
	* gcc.target/i386/pr68497.c: New test.

From-SVN: r230803
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cea194b0b83..02590a2eaea 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-11-24  Mikhail Maltsev  <maltsevm@gmail.com>
+
+	PR target/68497
+	* config/i386/i386.c (output_387_binary_op): Fix assertion for
+	-fno-checking case.
+
 2015-11-24  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>
 
 	* tree-ssa-uncprop.c (struct val_ssa_equiv_hash_traits): Remove.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index cc425442796..2ac6c259f41 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -17675,18 +17675,20 @@ output_387_binary_op (rtx insn, rtx *operands)
 
   /* Even if we do not want to check the inputs, this documents input
      constraints.  Which helps in understanding the following code.  */
-  if (flag_checking
-      && STACK_REG_P (operands[0])
-      && ((REG_P (operands[1])
-	   && REGNO (operands[0]) == REGNO (operands[1])
-	   && (STACK_REG_P (operands[2]) || MEM_P (operands[2])))
-	  || (REG_P (operands[2])
-	      && REGNO (operands[0]) == REGNO (operands[2])
-	      && (STACK_REG_P (operands[1]) || MEM_P (operands[1]))))
-      && (STACK_TOP_P (operands[1]) || STACK_TOP_P (operands[2])))
-    ; /* ok */
-  else
-    gcc_checking_assert (is_sse);
+  if (flag_checking)
+    {
+      if (STACK_REG_P (operands[0])
+	  && ((REG_P (operands[1])
+	       && REGNO (operands[0]) == REGNO (operands[1])
+	       && (STACK_REG_P (operands[2]) || MEM_P (operands[2])))
+	      || (REG_P (operands[2])
+		  && REGNO (operands[0]) == REGNO (operands[2])
+		  && (STACK_REG_P (operands[1]) || MEM_P (operands[1]))))
+	  && (STACK_TOP_P (operands[1]) || STACK_TOP_P (operands[2])))
+	; /* ok */
+      else
+	gcc_assert (is_sse);
+    }
 
   switch (GET_CODE (operands[3]))
     {
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 2b31f8c71b2..3ec74df4db3 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-11-24  Mikhail Maltsev  <maltsevm@gmail.com>
+
+	PR target/68497
+	* gcc.target/i386/pr68497.c: New test.
+
 2015-11-24  Bilyan Borisov  <bilyan.borisov@arm.com>
 
 	* gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f32_indices_1.c:
diff --git a/gcc/testsuite/gcc.target/i386/pr68497.c b/gcc/testsuite/gcc.target/i386/pr68497.c
new file mode 100644
index 00000000000..0135cda0d58
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr68497.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-fno-checking" } */
+
+long double
+foo (long double x, long double y)
+{
+  return x + y;
+}