From: lkcl <lkcl@web>
Date: Sun, 11 Sep 2022 17:51:39 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~491
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dbb29880da99257a9a7ade109603c5f2e9fec4f6;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn
index cb40d6e73..1d5da7ae7 100644
--- a/openpower/sv/rfc/ls001.mdwn
+++ b/openpower/sv/rfc/ls001.mdwn
@@ -394,14 +394,14 @@ overwhelmingly made moot. The only downside is that there is no
 `SVP64-Reserved` which will have to be achieved with SPRs (PCR or MSR).
 
 \newpage{}
-**EXT000-EXT031**
+**EXT000-EXT063**
 
 These are Scalar word-encodings. Often termed "v3.0 Scalar" in this document
 Power ISA v3.1 Section 1.6.3 Book I calls it a "Scalar word".
 
 | 0-5    | 6-31   |
 |--------|--------|
-| PO     | EXT000-031 Scalar (v3.0 or v3.1) operation |
+| PO     | EXT000-063 Scalar (v3.0 or v3.1) operation |
 
 **RESERVED2 / EXT300-363** bit6=old bit7=scalar