From: Luke Kenneth Casson Leighton Date: Sat, 4 Apr 2020 12:48:49 +0000 (+0100) Subject: move to header-template, fix bug in page name (use instruction name) X-Git-Tag: div_pipeline~1538 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dc00820b3adee179e7613a7d30ef0b8210edbcba;p=soc.git move to header-template, fix bug in page name (use instruction name) --- diff --git a/src/soc/decoder/pseudo/pywriter.py b/src/soc/decoder/pseudo/pywriter.py index ad0b09e0..a8eeb3ab 100644 --- a/src/soc/decoder/pseudo/pywriter.py +++ b/src/soc/decoder/pseudo/pywriter.py @@ -18,6 +18,14 @@ def create_args(reglist, extra=None): args = [extra] + args return ', '.join(args) +header = """\ +# auto-generated by pywriter.py, do not edit or commit + +from soc.decoder.isa import ISACaller +from soc.decoder.helpers import (EXTS64, EXTZ64, ROTL64, ROTL32, MASK,) + +class %s(ISACaller): +""" class PyISAWriter(ISA): def __init__(self): @@ -29,12 +37,8 @@ class PyISAWriter(ISA): fname = os.path.join(isadir, "%s.py" % pagename) with open(fname, "w") as f: iinf = '' - f.write("# auto-generated by pywriter.py, do not edit or commit\n") - f.write("from soc.decoder.isa import ISACaller\n\n") - f.write("from soc.decoder.helpers import " + \ - "(EXTS64, EXTZ64, ROTL64, ROTL32, MASK,)\n") - - f.write("class %s(ISACaller):\n" % pagename) + f.write(header % pagename) # write out header + # go through all instructions for page in instrs: d = self.instr[page] print (fname, d.opcode) @@ -55,11 +59,12 @@ class PyISAWriter(ISA): f.write(" return (%s,)\n\n" % retargs) else: f.write("\n") - # cumulate the instruction info + # accumulate the instruction info iinfo = "(%s, %s, %s, %s)" % \ - (pagename, rused['read_regs'], + (page, rused['read_regs'], rused['uninit_regs'], rused['write_regs']) iinf += " instrs['%s'] = %s\n" % (pagename, iinfo) + # write out initialisation of info, for ISACaller to use f.write(" instrs = {}\n") f.write(iinf)