From: Eddie Hung <eddie@fpgeh.com>
Date: Sat, 28 Sep 2019 00:45:49 +0000 (-0700)
Subject: Fix infinite recursion
X-Git-Tag: working-ls180~881^2^2~209
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dc154c39a8d296c0ed7619168d7b4eda95e2fbe0;p=yosys.git

Fix infinite recursion
---

diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc
index cc0857896..4045e8811 100644
--- a/backends/aiger/xaiger.cc
+++ b/backends/aiger/xaiger.cc
@@ -314,7 +314,7 @@ struct XAigerWriter
 					SigBit d = cell->getPort(abc_flop_d);
 					SigBit I = sigmap(d);
 					if (I != d)
-						alias_map[I] = d;
+						alias_map[d] = I;
 					unused_bits.erase(d);
 
 					auto abc_flop_q = r.first->second.q_port;