From: Neha Bhende Date: Tue, 26 May 2020 15:45:23 +0000 (+0530) Subject: winsys/drm: Add GL4.1 support in drm winsys X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dc3505f87ed69ac843cd4ce7d269b2ab01a32ff7;p=mesa.git winsys/drm: Add GL4.1 support in drm winsys This is to check whether virtual hardware has SM5 support Reviewed-by: Brian Paul Reviewed-by: Charmaine Lee Signed-off-by: Neha Bhende Part-of: --- diff --git a/src/gallium/drivers/svga/svga_winsys.h b/src/gallium/drivers/svga/svga_winsys.h index e489acd078b..88c1c6c7983 100644 --- a/src/gallium/drivers/svga/svga_winsys.h +++ b/src/gallium/drivers/svga/svga_winsys.h @@ -767,6 +767,9 @@ struct svga_winsys_screen /** Have SM4_1 hardware? */ boolean have_sm4_1; + /** Have SM5 hardware? */ + boolean have_sm5; + /** To rebind resources at the beginnning of a new command buffer */ boolean need_to_rebind_resources; diff --git a/src/gallium/winsys/svga/drm/vmw_screen.h b/src/gallium/winsys/svga/drm/vmw_screen.h index 4cf6b3fd895..73f04435a7e 100644 --- a/src/gallium/winsys/svga/drm/vmw_screen.h +++ b/src/gallium/winsys/svga/drm/vmw_screen.h @@ -80,6 +80,7 @@ struct vmw_winsys_screen boolean have_drm_2_15; boolean have_drm_2_16; boolean have_drm_2_17; + boolean have_drm_2_18; } ioctl; struct { diff --git a/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c b/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c index ed267e9ad68..a44c22c7595 100644 --- a/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c +++ b/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c @@ -52,7 +52,7 @@ #include #define VMW_MAX_DEFAULT_TEXTURE_SIZE (128 * 1024 * 1024) -#define VMW_FENCE_TIMEOUT_SECONDS 60 +#define VMW_FENCE_TIMEOUT_SECONDS 3600UL #define SVGA3D_FLAGS_64(upper32, lower32) (((uint64_t)upper32 << 32) | lower32) #define SVGA3D_FLAGS_UPPER_32(svga3d_flags) (svga3d_flags >> 32) @@ -64,6 +64,7 @@ struct vmw_region uint32_t handle; uint64_t map_handle; void *data; + uint32_t map_count; int drm_fd; uint32_t size; }; @@ -234,6 +235,7 @@ vmw_ioctl_gb_surface_create(struct vmw_winsys_screen *vws, req->version = drm_vmw_gb_surface_v1; req->multisample_pattern = multisamplePattern; req->quality_level = qualityLevel; + req->buffer_byte_stride = 0; req->must_be_zero = 0; req->base.svga3d_flags = SVGA3D_FLAGS_LOWER_32(flags); req->svga3d_flags_upper_32_bits = SVGA3D_FLAGS_UPPER_32(flags); @@ -636,6 +638,7 @@ vmw_ioctl_region_create(struct vmw_winsys_screen *vws, uint32_t size) region->data = NULL; region->handle = rep->handle; region->map_handle = rep->map_handle; + region->map_count = 0; region->size = size; region->drm_fd = vws->ioctl.drm_fd; @@ -657,7 +660,10 @@ vmw_ioctl_region_destroy(struct vmw_region *region) vmw_printf("%s: gmrId = %u, offset = %u\n", __FUNCTION__, region->ptr.gmrId, region->ptr.offset); - assert(region->data == NULL); + if (region->data) { + os_munmap(region->data, region->size); + region->data = NULL; + } memset(&arg, 0, sizeof(arg)); arg.handle = region->handle; @@ -696,6 +702,8 @@ vmw_ioctl_region_map(struct vmw_region *region) region->data = map; } + ++region->map_count; + return region->data; } @@ -705,6 +713,7 @@ vmw_ioctl_region_unmap(struct vmw_region *region) vmw_printf("%s: gmrId = %u, offset = %u\n", __FUNCTION__, region->ptr.gmrId, region->ptr.offset); + --region->map_count; os_munmap(region->data, region->size); region->data = NULL; } @@ -992,6 +1001,8 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws) (version->version_major == 2 && version->version_minor > 15); vws->ioctl.have_drm_2_17 = version->version_major > 2 || (version->version_major == 2 && version->version_minor > 16); + vws->ioctl.have_drm_2_18 = version->version_major > 2 || + (version->version_major == 2 && version->version_minor > 17); vws->ioctl.drm_execbuf_version = vws->ioctl.have_drm_2_9 ? 2 : 1; @@ -1102,6 +1113,16 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws) } } + if (vws->ioctl.have_drm_2_18 && vws->base.have_sm4_1) { + memset(&gp_arg, 0, sizeof(gp_arg)); + gp_arg.param = DRM_VMW_PARAM_SM5; + ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM, + &gp_arg, sizeof(gp_arg)); + if (ret == 0 && gp_arg.value != 0) { + vws->base.have_sm5 = TRUE; + } + } + memset(&gp_arg, 0, sizeof(gp_arg)); gp_arg.param = DRM_VMW_PARAM_3D_CAPS_SIZE; ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM, diff --git a/src/gallium/winsys/svga/drm/vmwgfx_drm.h b/src/gallium/winsys/svga/drm/vmwgfx_drm.h index fcb741e3068..9b422e5515b 100644 --- a/src/gallium/winsys/svga/drm/vmwgfx_drm.h +++ b/src/gallium/winsys/svga/drm/vmwgfx_drm.h @@ -103,6 +103,7 @@ extern "C" { #define DRM_VMW_PARAM_DX 12 #define DRM_VMW_PARAM_HW_CAPS2 13 #define DRM_VMW_PARAM_SM4_1 14 +#define DRM_VMW_PARAM_SM5 15 /** * enum drm_vmw_handle_type - handle type for ref ioctls @@ -1144,6 +1145,7 @@ enum drm_vmw_surface_version { * @svga3d_flags_upper_32_bits: Upper 32 bits of svga3d flags. * @multisample_pattern: Multisampling pattern when msaa is supported. * @quality_level: Precision settings for each sample. + * @buffer_byte_stride: Buffer byte stride. * @must_be_zero: Reserved for future usage. * * Input argument to the DRM_VMW_GB_SURFACE_CREATE_EXT Ioctl. @@ -1152,10 +1154,11 @@ enum drm_vmw_surface_version { struct drm_vmw_gb_surface_create_ext_req { struct drm_vmw_gb_surface_create_req base; enum drm_vmw_surface_version version; - uint32_t svga3d_flags_upper_32_bits; - SVGA3dMSPattern multisample_pattern; - SVGA3dMSQualityLevel quality_level; - uint64_t must_be_zero; + __u32 svga3d_flags_upper_32_bits; + __u32 multisample_pattern; + __u32 quality_level; + __u32 buffer_byte_stride; + __u32 must_be_zero; }; /**