From: lkcl <lkcl@web>
Date: Fri, 17 Jun 2022 10:02:24 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1738
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dc3a9448773ac40994efeb35db63a473b794b122;p=libreriscv.git

---

diff --git a/openpower/sv.mdwn b/openpower/sv.mdwn
index cf169f446..f91319e55 100644
--- a/openpower/sv.mdwn
+++ b/openpower/sv.mdwn
@@ -259,7 +259,10 @@ well-known Packed SIMD ISAs.
 
 * PackedSIMD VSX. VSX, which has the word "Vector" in its name,
   is "inspired" by Vector Processing
-  but has no "Scaling" capability, and no Predicate masking
+  but has no "Scaling" capability, and no Predicate masking.
+  Adding Predicate Masks to the PackedSIMD VSX ISA
+  would effectively double the number of PackedSIMD
+  instructions (750 becomes 1,500)
 * [AVX / AVX2 / AVX128 / AVX256 / AVX512](https://en.wikipedia.org/wiki/Advanced_Vector_Extensions)
   again has the word "Vector" in its name but this in no
   way makes it a Vector ISA. None of the AVX-\* family