From: Xiong, James <james.xiong@intel.com>
Date: Thu, 15 Aug 2019 17:02:52 +0000 (-0700)
Subject: gallium: add back YVU support
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dcad15ff542fc2afc16dfde1c326750c3009899c;p=mesa.git

gallium: add back YVU support

PIPE_FORMAT_YV12 is not handled so switching to PIPE_FORMAT_IYUV and
adding back YVU support.

Signed-off-by: James Xiong <james.xiong@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
---

diff --git a/src/gallium/state_trackers/dri/dri_helpers.c b/src/gallium/state_trackers/dri/dri_helpers.c
index 28e73293118..c6a898f121e 100644
--- a/src/gallium/state_trackers/dri/dri_helpers.c
+++ b/src/gallium/state_trackers/dri/dri_helpers.c
@@ -453,27 +453,27 @@ static const struct dri2_format_mapping dri2_format_table[] = {
           { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
 
       { __DRI_IMAGE_FOURCC_YVU410,        __DRI_IMAGE_FORMAT_NONE,
-        __DRI_IMAGE_COMPONENTS_Y_U_V,     PIPE_FORMAT_YV12, 3,
+        __DRI_IMAGE_COMPONENTS_Y_U_V,     PIPE_FORMAT_IYUV, 3,
         { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
           { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 },
           { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } },
       { __DRI_IMAGE_FOURCC_YVU411,        __DRI_IMAGE_FORMAT_NONE,
-        __DRI_IMAGE_COMPONENTS_Y_U_V,     PIPE_FORMAT_YV12, 3,
+        __DRI_IMAGE_COMPONENTS_Y_U_V,     PIPE_FORMAT_IYUV, 3,
         { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
           { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 },
           { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
       { __DRI_IMAGE_FOURCC_YVU420,        __DRI_IMAGE_FORMAT_NONE,
-        __DRI_IMAGE_COMPONENTS_Y_U_V,     PIPE_FORMAT_YV12, 3,
+        __DRI_IMAGE_COMPONENTS_Y_U_V,     PIPE_FORMAT_IYUV, 3,
         { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
           { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 },
           { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } },
       { __DRI_IMAGE_FOURCC_YVU422,        __DRI_IMAGE_FORMAT_NONE,
-        __DRI_IMAGE_COMPONENTS_Y_U_V,     PIPE_FORMAT_YV12, 3,
+        __DRI_IMAGE_COMPONENTS_Y_U_V,     PIPE_FORMAT_IYUV, 3,
         { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
           { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 },
           { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
       { __DRI_IMAGE_FOURCC_YVU444,        __DRI_IMAGE_FORMAT_NONE,
-        __DRI_IMAGE_COMPONENTS_Y_U_V,     PIPE_FORMAT_YV12, 3,
+        __DRI_IMAGE_COMPONENTS_Y_U_V,     PIPE_FORMAT_IYUV, 3,
         { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
           { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
           { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },