From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 20 May 2020 17:31:51 +0000 (+0100)
Subject: ehn? moo? CR test_pipe_caller locks up 100% CPU on writing ilang file
X-Git-Tag: div_pipeline~1019
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dcc2a29f28215104a85371e71787efb854a6aaba;p=soc.git

ehn? moo? CR test_pipe_caller locks up 100% CPU on writing ilang file
---

diff --git a/src/soc/fu/cr/test/test_pipe_caller.py b/src/soc/fu/cr/test/test_pipe_caller.py
index 0ee5977d..415ce48e 100644
--- a/src/soc/fu/cr/test/test_pipe_caller.py
+++ b/src/soc/fu/cr/test/test_pipe_caller.py
@@ -121,9 +121,8 @@ class CRTestCase(FHDLTestCase):
 
         pspec = ALUPipeSpec(id_wid=2, op_wid=get_rec_width(rec))
         alu = CRBasePipe(pspec)
-        ports = alu.ports()
         vl = rtlil.convert(alu, ports=alu.ports())
-        with open("logical_pipeline.il", "w") as f:
+        with open("cr_pipeline.il", "w") as f:
             f.write(vl)