From: Chad Versace <chad.versace@intel.com>
Date: Thu, 8 Oct 2015 18:53:08 +0000 (-0700)
Subject: i965/gen9: Disable MCS for 1x color surfaces
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dcd59a9e322edeea74187bcad65a8e56c0bfaaa2;p=mesa.git

i965/gen9: Disable MCS for 1x color surfaces

Fast color clears are disabled for gen9 (see the checks in
brw_meta_fast_clear), so there is no reason to allocate the MCS and
track its clear/resolve state.

Reviewed-by: Neil Roberts <neil@linux.intel.com>
---

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index a169c41790e..b6e35205727 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -201,6 +201,14 @@ intel_miptree_supports_non_msrt_fast_clear(struct brw_context *brw,
    if (brw->gen < 7)
       return false;
 
+   if (brw->gen >= 9) {
+      /* FINISHME: Enable singlesample fast MCS clears on SKL after all GPU
+       * FINISHME: hangs are resolved.
+       */
+      perf_debug("singlesample fast MCS clears disabled on gen9");
+      return false;
+   }
+
    if (mt->disable_aux_buffers)
       return false;