From: Bas Nieuwenhuizen Date: Wed, 8 Mar 2017 20:31:53 +0000 (+0100) Subject: radv: Invalidate the correct caches for CB/DB dst barriers. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dd094e4ff9ff0967b515a4330e40feca55247e25;p=mesa.git radv: Invalidate the correct caches for CB/DB dst barriers. Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Dave Airlie --- diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 07d0a0c2c12..088a3c9025c 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1497,13 +1497,19 @@ radv_dst_access_flush(struct radv_cmd_buffer *cmd_buffer, flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1 | RADV_CMD_FLAG_INV_SMEM_L1; break; case VK_ACCESS_SHADER_READ_BIT: - flush_bits |= RADV_CMD_FLAG_INV_GLOBAL_L2; - break; - case VK_ACCESS_COLOR_ATTACHMENT_READ_BIT: case VK_ACCESS_TRANSFER_READ_BIT: - case VK_ACCESS_TRANSFER_WRITE_BIT: case VK_ACCESS_INPUT_ATTACHMENT_READ_BIT: - flush_bits |= RADV_CMD_FLUSH_AND_INV_FRAMEBUFFER | RADV_CMD_FLAG_INV_GLOBAL_L2; + flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1 | + RADV_CMD_FLAG_INV_GLOBAL_L2; + break; + case VK_ACCESS_COLOR_ATTACHMENT_READ_BIT: + flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | + RADV_CMD_FLAG_FLUSH_AND_INV_CB_META; + break; + case VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT: + flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB | + RADV_CMD_FLAG_FLUSH_AND_INV_DB_META; + break; default: break; }