From: Ian Romanick Date: Thu, 6 Jun 2019 18:00:40 +0000 (-0700) Subject: intel/vec4: Delete vec4_visitor::emit_lrp X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dd2dc7e707b580b2db9b941df1edeaf6f179da60;p=mesa.git intel/vec4: Delete vec4_visitor::emit_lrp Effectivley unused since dd7135d55d5 ("intel/compiler: Use the flrp lowering pass for all stages on Gen4 and Gen5"). I had intended to remove this code as part of that series, but I forgot. Reviewed-by: Matt Turner --- diff --git a/src/intel/compiler/brw_vec4.h b/src/intel/compiler/brw_vec4.h index 4b24e2a2db8..7b25ed61b62 100644 --- a/src/intel/compiler/brw_vec4.h +++ b/src/intel/compiler/brw_vec4.h @@ -236,9 +236,6 @@ public: vec4_instruction *emit_minmax(enum brw_conditional_mod conditionalmod, dst_reg dst, src_reg src0, src_reg src1); - vec4_instruction *emit_lrp(const dst_reg &dst, const src_reg &x, - const src_reg &y, const src_reg &a); - /** * Copy any live channel from \p src to the first channel of the * result. diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp index 229d62b2ae4..a646496fdcf 100644 --- a/src/intel/compiler/brw_vec4_nir.cpp +++ b/src/intel/compiler/brw_vec4_nir.cpp @@ -1926,7 +1926,11 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr) break; case nir_op_flrp: - inst = emit_lrp(dst, op[0], op[1], op[2]); + op[0] = fix_3src_operand(op[0]); + op[1] = fix_3src_operand(op[1]); + op[2] = fix_3src_operand(op[2]); + + inst = emit(LRP(dst, op[2], op[1], op[0])); inst->saturate = instr->dest.saturate; break; diff --git a/src/intel/compiler/brw_vec4_visitor.cpp b/src/intel/compiler/brw_vec4_visitor.cpp index 09363c87093..3b60ddf9573 100644 --- a/src/intel/compiler/brw_vec4_visitor.cpp +++ b/src/intel/compiler/brw_vec4_visitor.cpp @@ -736,34 +736,6 @@ vec4_visitor::emit_minmax(enum brw_conditional_mod conditionalmod, dst_reg dst, return inst; } -vec4_instruction * -vec4_visitor::emit_lrp(const dst_reg &dst, - const src_reg &x, const src_reg &y, const src_reg &a) -{ - if (devinfo->gen >= 6 && devinfo->gen <= 10) { - /* Note that the instruction's argument order is reversed from GLSL - * and the IR. - */ - return emit(LRP(dst, fix_3src_operand(a), fix_3src_operand(y), - fix_3src_operand(x))); - } else { - /* Earlier generations don't support three source operations, so we - * need to emit x*(1-a) + y*a. - */ - dst_reg y_times_a = dst_reg(this, glsl_type::vec4_type); - dst_reg one_minus_a = dst_reg(this, glsl_type::vec4_type); - dst_reg x_times_one_minus_a = dst_reg(this, glsl_type::vec4_type); - y_times_a.writemask = dst.writemask; - one_minus_a.writemask = dst.writemask; - x_times_one_minus_a.writemask = dst.writemask; - - emit(MUL(y_times_a, y, a)); - emit(ADD(one_minus_a, negate(a), brw_imm_f(1.0f))); - emit(MUL(x_times_one_minus_a, x, src_reg(one_minus_a))); - return emit(ADD(dst, src_reg(x_times_one_minus_a), src_reg(y_times_a))); - } -} - /** * Emits the instructions needed to perform a pull constant load. before_block * and before_inst can be NULL in which case the instruction will be appended