From: Marek Olšák Date: Sat, 20 Sep 2014 09:54:46 +0000 (+0200) Subject: radeonsi/compute: do CS partial flush with si_emit_cache_flush X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dd53d53dc664946a445bcb9e26b1819f4b92a32c;p=mesa.git radeonsi/compute: do CS partial flush with si_emit_cache_flush Reviewed-by: Alex Deucher Reviewed-by: Tom Stellard --- diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index 9a5a100fa6d..4651bf8b147 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -75,6 +75,7 @@ #define R600_CONTEXT_WAIT_CP_DMA_IDLE (1 << 18) #define R600_CONTEXT_VGT_FLUSH (1 << 19) #define R600_CONTEXT_VGT_STREAMOUT_SYNC (1 << 20) +#define R600_CONTEXT_CS_PARTIAL_FLUSH (1 << 21) /* other flags */ #define R600_CONTEXT_FLAG_COMPUTE (1u << 31) diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index e24c6e22bb4..be644181796 100644 --- a/src/gallium/drivers/radeonsi/si_compute.c +++ b/src/gallium/drivers/radeonsi/si_compute.c @@ -361,10 +361,6 @@ static void si_launch_grid( si_pm4_cmd_add(pm4, 1); /* DISPATCH_INITIATOR */ si_pm4_cmd_end(pm4, false); - si_pm4_cmd_begin(pm4, PKT3_EVENT_WRITE); - si_pm4_cmd_add(pm4, EVENT_TYPE(V_028A90_CS_PARTIAL_FLUSH | EVENT_INDEX(0x4))); - si_pm4_cmd_end(pm4, false); - si_pm4_emit(sctx, pm4); #if 0 @@ -376,7 +372,8 @@ static void si_launch_grid( si_pm4_free_state(sctx, pm4, ~0); - sctx->b.flags |= R600_CONTEXT_INV_TEX_CACHE | + sctx->b.flags |= R600_CONTEXT_CS_PARTIAL_FLUSH | + R600_CONTEXT_INV_TEX_CACHE | R600_CONTEXT_INV_SHADER_CACHE | R600_CONTEXT_INV_CONST_CACHE | R600_CONTEXT_FLAG_COMPUTE; diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index a4b70177ea9..0888841f4a8 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -863,6 +863,11 @@ void si_emit_cache_flush(struct r600_common_context *sctx, struct r600_atom *ato radeon_emit(cs, EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) | EVENT_INDEX(4)); } + if (sctx->flags & R600_CONTEXT_CS_PARTIAL_FLUSH) { + radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0) | compute); + radeon_emit(cs, EVENT_TYPE(V_028A90_CS_PARTIAL_FLUSH | EVENT_INDEX(4))); + } + if (sctx->flags & R600_CONTEXT_VGT_FLUSH) { radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0) | compute); radeon_emit(cs, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0)); @@ -875,7 +880,7 @@ void si_emit_cache_flush(struct r600_common_context *sctx, struct r600_atom *ato sctx->flags = 0; } -const struct r600_atom si_atom_cache_flush = { si_emit_cache_flush, 19 }; /* number of CS dwords */ +const struct r600_atom si_atom_cache_flush = { si_emit_cache_flush, 21 }; /* number of CS dwords */ static void si_get_draw_start_count(struct si_context *sctx, const struct pipe_draw_info *info,