From: Jan Beulich <jbeulich@suse.com>
Date: Mon, 8 Jun 2020 06:40:58 +0000 (+0200)
Subject: x86: also handle %k<N> and %bnd<N> in debugging helpers
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dd6b8a0bc27667532cb4afd31caf85121aa5a751;p=binutils-gdb.git

x86: also handle %k<N> and %bnd<N> in debugging helpers

Adjustment of this function was missed when support for the respective
registers was added.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 27ffa3c52b8..4d6a4bcd271 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2020-06-08  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (pi): Add checks for RegMask and RegBND.
+
 2020-06-08  Jan Beulich  <jbeulich@suse.com>
 
 	* config/tc-i386.c (check_byte_reg): Drop dead conditional
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index e0ebf80d8aa..15d6257b35b 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -3198,10 +3198,12 @@ pi (const char *line, i386_insn *x)
       if (x->types[j].bitfield.class == Reg
 	  || x->types[j].bitfield.class == RegMMX
 	  || x->types[j].bitfield.class == RegSIMD
+	  || x->types[j].bitfield.class == RegMask
 	  || x->types[j].bitfield.class == SReg
 	  || x->types[j].bitfield.class == RegCR
 	  || x->types[j].bitfield.class == RegDR
-	  || x->types[j].bitfield.class == RegTR)
+	  || x->types[j].bitfield.class == RegTR
+	  || x->types[j].bitfield.class == RegBND)
 	fprintf (stdout, "%s\n", x->op[j].regs->reg_name);
       if (operand_type_check (x->types[j], imm))
 	pe (x->op[j].imms);