From: Samuel Pitoiset Date: Thu, 26 Oct 2017 16:08:19 +0000 (+0200) Subject: radeonsi: update hack for HTILE corruption in ARK: Survival Evolved X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dd79aa4ad30df205076be25f6bbf42768abea20a;p=mesa.git radeonsi: update hack for HTILE corruption in ARK: Survival Evolved It appears that flushing the DB metadata is actually not sufficient since the driver uses the new VS blit shaders. This looks quite strange though, but it seems like we need to flush DB for fixing the corruption. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102955 Fixes: 69ccb9dae7 (radeonsi: use new VS blit shaders (VS inputs in SGPRs) Signed-off-by: Samuel Pitoiset Reviewed-by: Marek Olšák --- diff --git a/src/gallium/drivers/radeonsi/driinfo_radeonsi.h b/src/gallium/drivers/radeonsi/driinfo_radeonsi.h index 402d3406d45..7f57b4ea892 100644 --- a/src/gallium/drivers/radeonsi/driinfo_radeonsi.h +++ b/src/gallium/drivers/radeonsi/driinfo_radeonsi.h @@ -6,5 +6,5 @@ DRI_CONF_SECTION_PERFORMANCE DRI_CONF_SECTION_END DRI_CONF_SECTION_DEBUG - DRI_CONF_RADEONSI_CLEAR_DB_META_BEFORE_CLEAR("false") + DRI_CONF_RADEONSI_CLEAR_DB_CACHE_BEFORE_CLEAR("false") DRI_CONF_SECTION_END diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c index fd8559ac98c..abf25b605e8 100644 --- a/src/gallium/drivers/radeonsi/si_blit.c +++ b/src/gallium/drivers/radeonsi/si_blit.c @@ -901,16 +901,16 @@ static void si_clear(struct pipe_context *ctx, unsigned buffers, * corruption in ARK: Survival Evolved, but that may just be * a coincidence and the root cause is elsewhere. * - * The corruption can be fixed by putting the DB metadata flush - * before or after the depth clear. (suprisingly) + * The corruption can be fixed by putting the DB flush before + * or after the depth clear. (surprisingly) * * https://bugs.freedesktop.org/show_bug.cgi?id=102955 (apitrace) * * This hack decreases back-to-back ClearDepth performance. */ - if (sctx->screen->clear_db_meta_before_clear) - sctx->b.flags |= SI_CONTEXT_FLUSH_AND_INV_DB_META | - SI_CONTEXT_PS_PARTIAL_FLUSH; + if (sctx->screen->clear_db_cache_before_clear) { + sctx->b.flags |= SI_CONTEXT_FLUSH_AND_INV_DB; + } } si_blitter_begin(ctx, SI_CLEAR); diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 759d5394719..a6c3aa03d30 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -1072,8 +1072,8 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws, driQueryOptionb(config->options, "radeonsi_assume_no_z_fights"); sscreen->commutative_blend_add = driQueryOptionb(config->options, "radeonsi_commutative_blend_add"); - sscreen->clear_db_meta_before_clear = - driQueryOptionb(config->options, "radeonsi_clear_db_meta_before_clear"); + sscreen->clear_db_cache_before_clear = + driQueryOptionb(config->options, "radeonsi_clear_db_cache_before_clear"); sscreen->has_msaa_sample_loc_bug = (sscreen->b.family >= CHIP_POLARIS10 && sscreen->b.family <= CHIP_POLARIS12) || sscreen->b.family == CHIP_VEGA10 || diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index c162a0fcd62..8d7703b0e4b 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -98,7 +98,7 @@ struct si_screen { bool has_out_of_order_rast; bool assume_no_z_fights; bool commutative_blend_add; - bool clear_db_meta_before_clear; + bool clear_db_cache_before_clear; bool has_msaa_sample_loc_bug; bool dpbb_allowed; bool dfsm_allowed; diff --git a/src/util/drirc b/src/util/drirc index 39ac3c858c7..05630eb1a92 100644 --- a/src/util/drirc +++ b/src/util/drirc @@ -264,7 +264,7 @@ TODO: document the other workarounds. - diff --git a/src/util/xmlpool/t_options.h b/src/util/xmlpool/t_options.h index 957ed615048..41f6ebd62d3 100644 --- a/src/util/xmlpool/t_options.h +++ b/src/util/xmlpool/t_options.h @@ -444,7 +444,7 @@ DRI_CONF_OPT_BEGIN_B(radeonsi_commutative_blend_add, def) \ DRI_CONF_DESC(en,gettext("Commutative additive blending optimizations (may cause rendering errors)")) \ DRI_CONF_OPT_END -#define DRI_CONF_RADEONSI_CLEAR_DB_META_BEFORE_CLEAR(def) \ -DRI_CONF_OPT_BEGIN_B(radeonsi_clear_db_meta_before_clear, def) \ - DRI_CONF_DESC(en,"Clear DB metadata cache before fast depth clear") \ +#define DRI_CONF_RADEONSI_CLEAR_DB_CACHE_BEFORE_CLEAR(def) \ +DRI_CONF_OPT_BEGIN_B(radeonsi_clear_db_cache_before_clear, def) \ + DRI_CONF_DESC(en,"Clear DB cache before fast depth clear") \ DRI_CONF_OPT_END