From: lkcl <lkcl@web>
Date: Wed, 1 Sep 2021 18:36:26 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~263
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dd848f6688a667166a7794db0f290430e04b7e93;p=libreriscv.git

---

diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn
index 54355b67d..31d100c96 100644
--- a/openpower/sv/ldst.mdwn
+++ b/openpower/sv/ldst.mdwn
@@ -199,8 +199,7 @@ The modes for `RA+RB` indexed version are slightly different:
 
 | 0-1 |  2  |  3   4  |  description              |
 | --- | --- |---------|-------------------------- |
-| 00  |   0 |  dz  sz | normal mode                      |
-| 00  |   1 |  dz SEA | Signed Effective Address         |
+| 00  | SEA |  dz  sz | Signed Effective Address         |
 | 01  | inv | CR-bit  | Rc=1: ffirst CR sel              |
 | 01  | inv | dz  RC1 |  Rc=0: ffirst z/nonz |
 | 10  |   N | dz   sz |  sat mode: N=0/1 u/s |