From: lkcl <lkcl@web>
Date: Sat, 20 Aug 2022 14:45:00 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~820
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=de09beaf083627357cd2ff7efe9f28da544caf12;p=libreriscv.git

---

diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn
index be508e03d..3909949d6 100644
--- a/openpower/sv/ldst.mdwn
+++ b/openpower/sv/ldst.mdwn
@@ -300,7 +300,8 @@ contexts, potentially causing confusion.
 
 Whilst it may be costly in terms of register reads to allow REMAP
 Indexed Mode to be applied to any Vectorised LD/ST Indexed operation such as
-`sv.ld *RT,RA,*RB`, or even viewed as redundant, firstly the strict
+`sv.ld *RT,RA,*RB`, or even misleadingly
+labelled  as redundant, firstly the strict
 application of the RISC Paradigm that Simple-V follows makes it awkward
 to consider *preventing* the application of Indexed REMAP to such
 operations, and secondly they are not actually the same at all.