From: Jean THOMAS Date: Fri, 7 Aug 2020 18:35:47 +0000 (+0200) Subject: Add links to other memory controller projects X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=de21ca921acdce4f268041ad7dec948e134fcecd;p=gram.git Add links to other memory controller projects --- diff --git a/doc/documentation.md b/doc/documentation.md index 77ad88a..e1ecf58 100644 --- a/doc/documentation.md +++ b/doc/documentation.md @@ -7,4 +7,9 @@ ## Memory chips * [A datasheet from Micron](https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/1gb_ddr3_sdram.pdf) - * [Samsung DDR3 SDRAM Specification: Device Operation & Timing Diagram](https://www.samsung.com/semiconductor/global.semi/file/resource/2017/11/ddr3_device_operation_timing_diagram_rev14-2.pdf) \ No newline at end of file + * [Samsung DDR3 SDRAM Specification: Device Operation & Timing Diagram](https://www.samsung.com/semiconductor/global.semi/file/resource/2017/11/ddr3_device_operation_timing_diagram_rev14-2.pdf) + +## Other open source memory controllers + + * [Enjoy-Digital LiteDRAM](https://github.com/enjoy-digital/litedram) + * [UltraEmbedded core_ddr3_controller](https://github.com/ultraembedded/core_ddr3_controller)