From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 18 Apr 2021 20:17:34 +0000 (+0100)
Subject: rename SPBlock_512W64B8W to lowercase
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=de23e67f13c0b828850d39d99a1f989dea6942fa;p=soc.git

rename SPBlock_512W64B8W to lowercase
---

diff --git a/src/soc/bus/SPBlock512W64B8W.py b/src/soc/bus/SPBlock512W64B8W.py
index b86a78b3..02836a40 100644
--- a/src/soc/bus/SPBlock512W64B8W.py
+++ b/src/soc/bus/SPBlock512W64B8W.py
@@ -44,7 +44,7 @@ class SPBlock512W64B8W(Elaboratable):
 
         # create Chips4Makers 4k SRAM cell here, mark it as "black box"
         # for coriolis2 to pick up
-        sram = Instance("SPBlock_512W64B8W", i_a=a, o_q=q, i_d=d,
+        sram = Instance("spblock_512w64b8w", i_a=a, o_q=q, i_d=d,
                                              i_we=we, i_clk=ClockSignal())
         m.submodules += sram
         # has to be added to the actual module rather than the instance
diff --git a/src/soc/litex/florent b/src/soc/litex/florent
index d5b08ba4..f1eb3ba9 160000
--- a/src/soc/litex/florent
+++ b/src/soc/litex/florent
@@ -1 +1 @@
-Subproject commit d5b08ba4b0ee2fd2d23246fd456e633d8cc2264d
+Subproject commit f1eb3ba9e89bdb1748e6655cbe8342f4e0704cae