From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 10 Sep 2020 11:02:53 +0000 (+0100)
Subject: add additional vhdl-vs-nmigen screenshots to openpower2020
X-Git-Tag: convert-csv-opcode-to-binary~2153
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=de68887bcef0e479ef4ef9675132c413d1df5e6c;p=libreriscv.git

add additional vhdl-vs-nmigen screenshots to openpower2020
---

diff --git a/simple_v_extension/2020-09-10_11-46.png b/simple_v_extension/2020-09-10_11-46.png
new file mode 100644
index 000000000..a4c40f475
Binary files /dev/null and b/simple_v_extension/2020-09-10_11-46.png differ
diff --git a/simple_v_extension/2020-09-10_11-53.png b/simple_v_extension/2020-09-10_11-53.png
new file mode 100644
index 000000000..fc637df58
Binary files /dev/null and b/simple_v_extension/2020-09-10_11-53.png differ
diff --git a/simple_v_extension/openpower_2020.tex b/simple_v_extension/openpower_2020.tex
index f2b614215..de9394154 100644
--- a/simple_v_extension/openpower_2020.tex
+++ b/simple_v_extension/openpower_2020.tex
@@ -198,6 +198,22 @@
   \end{itemize}
 }
 
+\frame{\frametitle{nmigen (dynamic) vs VHDL (static)}
+
+\begin{center}
+\includegraphics[width=1.0\textwidth]{2020-09-10_11-53.png}
+\end{center}
+
+}
+
+\frame{\frametitle{nmigen PowerISA Decoder}
+
+\begin{center}
+\includegraphics[width=1.0\textwidth]{2020-09-10_11-46.png}
+\end{center}
+
+}
+
 \frame{\frametitle{nmigen PowerISA Decoder}
 
 \begin{center}
@@ -205,6 +221,7 @@
 \end{center}
 
 }
+
 \frame{\frametitle{Summary}
 
  \begin{itemize}