From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 1 Aug 2018 07:39:09 +0000 (+0100)
Subject: AddingPeripherals.mdwn
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dec2fa9b6b08f885921704d5aa594a0c46ed361f;p=pinmux.git

AddingPeripherals.mdwn
---

diff --git a/docs/AddingPeripherals.mdwn b/docs/AddingPeripherals.mdwn
index 091fe1b..2c04d29 100644
--- a/docs/AddingPeripherals.mdwn
+++ b/docs/AddingPeripherals.mdwn
@@ -302,4 +302,26 @@ at the bottom of src/bsv/peripheral\_gen/base.py, in the "PFactory"
                  'quart': quart,
 
 Note that the name "SDR" matches with the prefix used in the pinspec
-declaration, back in src/spec/pinfunctions.py, except lower-cased.
+declaration, back in src/spec/pinfunctions.py, except lower-cased.  Once this
+is done, and the auto-generation tool re-run, examining the
+slow\_peripherals.bsv file again shows the following (correct) and only
+the following (correct) additions:
+
+    method Bit#(1) quart0_intr;
+    method Bit#(1) quart1_intr;
+    interface GPIO_config#(28) pad_configa;
+    interface PeripheralSideSDR sdr0;        <--
+    interface PeripheralSideFB fb0;
+
+    ....
+    ....
+    interface iocell_side=pinmux.iocell_side;
+    interface sdr0 = pinmux.peripheral_side.sdr;   <--
+    interface fb0 = pinmux.peripheral_side.fb;
+
+These automatically-generated declarations are sufficient to "pass through"
+the SDRAM "Peripheral Side", which as we know from examination of the code
+is directly connected to the relevant IO pad cells, so that the *actual*
+peripheral may be declared in the "fast" fabric and connected up to the
+relevant and required "fast" bus.
+