From: Rhys Perry Date: Mon, 16 Mar 2020 13:47:55 +0000 (+0000) Subject: aco: fix instruction encoding for LS VGPR init bug workaround X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ded7a8bb4625b28add06f8550526f2169045e87c;p=mesa.git aco: fix instruction encoding for LS VGPR init bug workaround Fixes: a952bf3946 ('aco: Fix LS VGPR init bug on affected hardware.') Signed-off-by: Rhys Perry Reviewed-By: Timur Kristóf Part-of: --- diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 195c57950c5..ff39ad854cd 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -9501,15 +9501,15 @@ void fix_ls_vgpr_init_bug(isel_context *ctx, Pseudo_instruction *startpgm) /* If there are no HS threads, SPI mistakenly loads the LS VGPRs starting at VGPR 0. */ - Temp instance_id = bld.sop2(aco_opcode::v_cndmask_b32, bld.def(v1), + Temp instance_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1), get_arg(ctx, ctx->args->ac.instance_id), get_arg(ctx, ctx->args->rel_auto_id), ls_has_nonzero_hs_threads); - Temp rel_auto_id = bld.sop2(aco_opcode::v_cndmask_b32, bld.def(v1), + Temp rel_auto_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1), get_arg(ctx, ctx->args->rel_auto_id), get_arg(ctx, ctx->args->ac.tcs_rel_ids), ls_has_nonzero_hs_threads); - Temp vertex_id = bld.sop2(aco_opcode::v_cndmask_b32, bld.def(v1), + Temp vertex_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1), get_arg(ctx, ctx->args->ac.vertex_id), get_arg(ctx, ctx->args->ac.tcs_patch_id), ls_has_nonzero_hs_threads);