From: Joel Hestness <hestness@cs.utexas.edu>
Date: Mon, 7 Feb 2011 06:14:18 +0000 (-0800)
Subject: Ruby: Fix to return cache block size to CPU for split data transfers
X-Git-Tag: stable_2012_02_02~587
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=dedb4fbf058c96597cd48e506e4a3479b192d9aa;p=gem5.git

Ruby: Fix to return cache block size to CPU for split data transfers
---

diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
index d1c306bb2..305228a8f 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -370,3 +370,9 @@ RubyPort::M5Port::isPhysMemAddress(Addr addr)
     }
     return false;
 }
+
+unsigned
+RubyPort::M5Port::deviceBlockSize() const
+{
+    return (unsigned) RubySystem::getBlockSizeBytes();
+}
diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh
index 56701cd5c..a2316781a 100644
--- a/src/mem/ruby/system/RubyPort.hh
+++ b/src/mem/ruby/system/RubyPort.hh
@@ -36,6 +36,7 @@
 #include "mem/physical.hh"
 #include "mem/protocol/RequestStatus.hh"
 #include "mem/ruby/libruby.hh"
+#include "mem/ruby/system/System.hh"
 #include "mem/tport.hh"
 #include "params/RubyPort.hh"
 
@@ -54,6 +55,7 @@ class RubyPort : public MemObject
         M5Port(const std::string &_name, RubyPort *_port);
         bool sendTiming(PacketPtr pkt);
         void hitCallback(PacketPtr pkt);
+        unsigned deviceBlockSize() const;
 
       protected:
         virtual bool recvTiming(PacketPtr pkt);