From: Luke Kenneth Casson Leighton Date: Sun, 24 Jul 2022 00:35:55 +0000 (+0100) Subject: table update X-Git-Tag: opf_rfc_ls005_v1~1057 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=df25ea48bfbee69178faaf6b202d7486cf1a5efd;p=libreriscv.git table update --- diff --git a/openpower/sv/executive_summary.mdwn b/openpower/sv/executive_summary.mdwn index 782bbc110..a0d13125c 100644 --- a/openpower/sv/executive_summary.mdwn +++ b/openpower/sv/executive_summary.mdwn @@ -45,15 +45,15 @@ We invented Simple-V to be simple because we don't like complicated. | **Unit tests and simulator for Power ISA v3.0 and SVP64** | | | |---------------------------------------------------------------------------------------------| -| **pypowersim tutorial** | -| | -|--------------------------------------------------| -| **several thousand more ISA unit tests** | -| | -|--------------------------------------------------| +| **pypowersim tutorial** | +| | +|---------------------------------------------------------------------------------------------| +| **several thousand more ISA unit tests** | +| | +|---------------------------------------------------------------------------------------------| | **demo, showing 4.5x reduction in program size for MP3 decode, greatly simplifies assembler development** | -| | -|--------------------------------------------------| -| **binutils support for SVP64** | -| | -|--------------------------------------------------| +| | +|---------------------------------------------------------------------------------------------| +| **binutils support for SVP64** | +| | +|---------------------------------------------------------------------------------------------|